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[88.10.103.181]) by smtp.gmail.com with ESMTPSA id y80sm11319660wmc.34.2020.06.05.00.40.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 05 Jun 2020 00:40:20 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v5 05/11] rules.mak: Add base-arch() rule Date: Fri, 5 Jun 2020 09:39:47 +0200 Message-Id: <20200605073953.19268-6-philmd@redhat.com> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20200605073953.19268-1-philmd@redhat.com> References: <20200605073953.19268-1-philmd@redhat.com> MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.120; envelope-from=philmd@redhat.com; helo=us-smtp-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/05 03:27:26 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Add a rule to return the base architecture for a QEMU target. The current list of TARGET_BASE_ARCH is: $ git grep TARGET_BASE_ARCH configure configure:7785:TARGET_BASE_ARCH="" configure:7795: TARGET_BASE_ARCH=i386 configure:7813: TARGET_BASE_ARCH=arm configure:7846: TARGET_BASE_ARCH=mips configure:7854: TARGET_BASE_ARCH=mips configure:7864: TARGET_BASE_ARCH=openrisc configure:7871: TARGET_BASE_ARCH=ppc configure:7879: TARGET_BASE_ARCH=ppc configure:7887: TARGET_BASE_ARCH=ppc configure:7894: TARGET_BASE_ARCH=riscv configure:7900: TARGET_BASE_ARCH=riscv configure:7920: TARGET_BASE_ARCH=sparc configure:7925: TARGET_BASE_ARCH=sparc The rule can be tested calling 'print-base-arch-$TARGET': $ make \ print-base-arch-openrisc \ print-base-arch-aarch64_be \ print-base-arch-x86_64 \ print-base-arch-mips64el \ print-base-arch-ppc64 \ print-base-arch-riscv64 openrisc=openrisc aarch64_be=arm x86_64=i386 mips64el=mips ppc64=ppc riscv64=riscv Signed-off-by: Philippe Mathieu-Daudé --- v5: - risc -> riscv (rth) - use strequal (rth) - add microblaze/sh4/xtensa v4: - use startwith() - fix openrisc (rth) --- rules.mak | 35 +++++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/rules.mak b/rules.mak index ccc1c49604..907f9aca91 100644 --- a/rules.mak +++ b/rules.mak @@ -452,3 +452,38 @@ atomic = $(eval $1: $(call sentinel,$1) ; @:) \ print-%: @echo '$*=$($*)' + +# base-arch +# Usage: $(call base-arch, target) +# +# @target: the target architecture. +# +# This macro will return the base architecture for a target. +# +# As example, $(call base-arch, aarch64) returns 'arm'. +base-arch = $(strip \ + $(if $(call startwith,aarch64,$1),arm,\ + $(if $(call startwith,arm,$1),arm,\ + $(if $(call startwith,microblaze,$1),microblaze,\ + $(if $(call startwith,mips,$1),mips,\ + $(if $(call startwith,ppc,$1),ppc,\ + $(if $(call startwith,riscv,$1),riscv,\ + $(if $(call startwith,sh4,$1),sh4,\ + $(if $(call startwith,sparc,$1),sparc,\ + $(if $(call startwith,xtensa,$1),xtensa,\ + $(if $(call strequal,x86_64,$1),i386,\ + $1\ + )\ + )\ + )\ + )\ + )\ + )\ + )\ + )\ + )\ + )\ + ) + +print-base-arch-%: + @echo '$*=$(call base-arch,$*)'