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Sat, 13 Jun 2020 04:20:32 GMT Received: from b03cxnp08026.gho.boulder.ibm.com (b03cxnp08026.gho.boulder.ibm.com [9.17.130.18]) by ppma04dal.us.ibm.com with ESMTP id 31mpe80p5y-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Sat, 13 Jun 2020 04:20:32 +0000 Received: from b03ledav005.gho.boulder.ibm.com (b03ledav005.gho.boulder.ibm.com [9.17.130.236]) by b03cxnp08026.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 05D4KTDl31916490 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Sat, 13 Jun 2020 04:20:29 GMT Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 00094BE056; Sat, 13 Jun 2020 04:20:30 +0000 (GMT) Received: from b03ledav005.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6CCE7BE051; Sat, 13 Jun 2020 04:20:30 +0000 (GMT) Received: from pompom.ibm.com (unknown [9.65.217.131]) by b03ledav005.gho.boulder.ibm.com (Postfix) with ESMTP; Sat, 13 Jun 2020 04:20:30 +0000 (GMT) From: Lijun Pan To: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH 1/6] target/ppc: add byte-reverse br[dwh] instructions Date: Fri, 12 Jun 2020 23:20:24 -0500 Message-Id: <20200613042029.22321-2-ljp@linux.ibm.com> X-Mailer: git-send-email 2.22.0 In-Reply-To: <20200613042029.22321-1-ljp@linux.ibm.com> References: <20200613042029.22321-1-ljp@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.216, 18.0.687 definitions=2020-06-13_01:2020-06-12, 2020-06-13 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 mlxlogscore=804 cotscore=-2147483648 lowpriorityscore=0 phishscore=0 impostorscore=0 mlxscore=0 suspectscore=2 malwarescore=0 spamscore=0 adultscore=0 bulkscore=0 priorityscore=1501 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2004280000 definitions=main-2006130032 Received-SPF: pass client-ip=148.163.158.5; envelope-from=ljp@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/06/13 00:20:34 X-ACL-Warn: Detected OS = Linux 3.x [generic] X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lijun Pan Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" POWER ISA 3.1 introduces following byte-reverse instructions: brd: Byte-Reverse Doubleword X-form brw: Byte-Reverse Word X-form brh: Byte-Reverse Halfword X-form Signed-off-by: Lijun Pan --- target/ppc/translate.c | 62 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 62 insertions(+) diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 4ce3d664b5..2d48fbc8db 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -6971,7 +6971,69 @@ static void gen_dform3D(DisasContext *ctx) return gen_invalid(ctx); } +/* brd */ +static void gen_brd(DisasContext *ctx) +{ + TCGv_i64 temp = tcg_temp_new_i64(); + + tcg_gen_bswap64_i64(temp, cpu_gpr[rS(ctx->opcode)]); + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState, gpr[rA(ctx->opcode)])); + + tcg_temp_free_i64(temp); +} + +/* brw */ +static void gen_brw(DisasContext *ctx) +{ + TCGv_i64 temp = tcg_temp_new_i64(); + TCGv_i64 lsb = tcg_temp_new_i64(); + TCGv_i64 msb = tcg_temp_new_i64(); + + tcg_gen_movi_i64(lsb, 0x00000000ffffffffull); + tcg_gen_and_i64(temp, lsb, cpu_gpr[rS(ctx->opcode)]); + tcg_gen_bswap32_i64(lsb, temp); + + tcg_gen_shri_i64(msb, cpu_gpr[rS(ctx->opcode)], 32); + tcg_gen_bswap32_i64(temp, msb); + tcg_gen_shli_i64(msb, temp, 32); + + tcg_gen_or_i64(temp, lsb, msb); + + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState, gpr[rA(ctx->opcode)])); + + tcg_temp_free_i64(temp); + tcg_temp_free_i64(lsb); + tcg_temp_free_i64(msb); +} + +/* brh */ +static void gen_brh(DisasContext *ctx) +{ + TCGv_i64 temp = tcg_temp_new_i64(); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + TCGv_i64 t2 = tcg_temp_new_i64(); + TCGv_i64 t3 = tcg_temp_new_i64(); + + tcg_gen_movi_i64(t0, 0x00ff00ff00ff00ffull); + tcg_gen_shri_i64(t1, cpu_gpr[rS(ctx->opcode)], 8); + tcg_gen_and_i64(t2, t1, t0); + tcg_gen_and_i64(t1, cpu_gpr[rS(ctx->opcode)], t0); + tcg_gen_shli_i64(t1, t1, 8); + tcg_gen_or_i64(temp, t1, t2); + tcg_gen_st_i64(temp, cpu_env, offsetof(CPUPPCState, gpr[rA(ctx->opcode)])); + + tcg_temp_free_i64(temp); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + tcg_temp_free_i64(t2); + tcg_temp_free_i64(t3); +} + static opcode_t opcodes[] = { +GEN_HANDLER_E(brd, 0x1F, 0x1B, 0x05, 0x0000F801, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(brw, 0x1F, 0x1B, 0x04, 0x0000F801, PPC_NONE, PPC2_ISA300), +GEN_HANDLER_E(brh, 0x1F, 0x1B, 0x06, 0x0000F801, PPC_NONE, PPC2_ISA300), GEN_HANDLER(invalid, 0x00, 0x00, 0x00, 0xFFFFFFFF, PPC_NONE), GEN_HANDLER(cmp, 0x1F, 0x00, 0x00, 0x00400000, PPC_INTEGER), GEN_HANDLER(cmpi, 0x0B, 0xFF, 0xFF, 0x00400000, PPC_INTEGER),