Message ID | 20200629130731.1080-2-zhiwei_liu@c-sky.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/riscv: fixup atomic implementation | expand |
On 6/29/20 6:07 AM, LIU Zhiwei wrote: > @@ -3189,7 +3189,7 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val, > > memop = tcg_canonicalize_memop(memop, 0, 0); > > - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN); > + tcg_gen_qemu_ld_i32(t1, addr, idx, memop); > gen(t2, t1, val); > tcg_gen_qemu_st_i32(t2, addr, idx, memop); > > @@ -3232,7 +3232,7 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, > > memop = tcg_canonicalize_memop(memop, 1, 0); > > - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN); > + tcg_gen_qemu_ld_i64(t1, addr, idx, memop); > gen(t2, t1, val); > tcg_gen_qemu_st_i64(t2, addr, idx, memop); This is insufficient for smin/smax -- we also need to extend the "val" input. r~
On 2020/6/30 22:56, Richard Henderson wrote: > On 6/29/20 6:07 AM, LIU Zhiwei wrote: >> @@ -3189,7 +3189,7 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val, >> >> memop = tcg_canonicalize_memop(memop, 0, 0); >> >> - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN); >> + tcg_gen_qemu_ld_i32(t1, addr, idx, memop); >> gen(t2, t1, val); >> tcg_gen_qemu_st_i32(t2, addr, idx, memop); >> >> @@ -3232,7 +3232,7 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, >> >> memop = tcg_canonicalize_memop(memop, 1, 0); >> >> - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN); >> + tcg_gen_qemu_ld_i64(t1, addr, idx, memop); >> gen(t2, t1, val); >> tcg_gen_qemu_st_i64(t2, addr, idx, memop); > This is insufficient for smin/smax -- we also need to extend the "val" input. Do you mean we should call tcg_gen_ext_i64(val, val, memop) before gen(t2, t1, val) for do_nonatomic_op_i64? I think it will be good if it doesn't have any other side effects. Zhiwei > > > r~
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index e60b74fb82..75b31048f5 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -3189,7 +3189,7 @@ static void do_nonatomic_op_i32(TCGv_i32 ret, TCGv addr, TCGv_i32 val, memop = tcg_canonicalize_memop(memop, 0, 0); - tcg_gen_qemu_ld_i32(t1, addr, idx, memop & ~MO_SIGN); + tcg_gen_qemu_ld_i32(t1, addr, idx, memop); gen(t2, t1, val); tcg_gen_qemu_st_i32(t2, addr, idx, memop); @@ -3232,7 +3232,7 @@ static void do_nonatomic_op_i64(TCGv_i64 ret, TCGv addr, TCGv_i64 val, memop = tcg_canonicalize_memop(memop, 1, 0); - tcg_gen_qemu_ld_i64(t1, addr, idx, memop & ~MO_SIGN); + tcg_gen_qemu_ld_i64(t1, addr, idx, memop); gen(t2, t1, val); tcg_gen_qemu_st_i64(t2, addr, idx, memop);
As an op follows load, MO_SIGN should not be cleared. Thus, we can call tcg_gen_atomic_*_i64 with a smaller Memop than MO_Q. Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com> --- tcg/tcg-op.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)