@@ -1294,6 +1294,12 @@ static void nvme_aio_zone_reset_cb(NvmeAIO *aio, void *opaque, int ret)
}
}
+static void nvme_zone_append_cb(NvmeRequest *req, void *opaque)
+{
+ trace_pci_nvme_zone_append_cb(nvme_cid(req), le64_to_cpu(req->cqe.qw0));
+ nvme_rw_cb(req, opaque);
+}
+
static void nvme_aio_cb(void *opaque, int ret)
{
NvmeAIO *aio = opaque;
@@ -1424,6 +1430,104 @@ static uint16_t nvme_flush(NvmeCtrl *n, NvmeRequest *req)
return NVME_NO_COMPLETE;
}
+static uint16_t nvme_do_zone_append(NvmeCtrl *n, NvmeRequest *req,
+ NvmeZone *zone)
+{
+ NvmeAIO *aio;
+ NvmeNamespace *ns = req->ns;
+
+ uint64_t zslba = nvme_zslba(zone);
+ uint64_t wp = zone->wp_staging;
+
+ size_t len;
+ uint16_t status;
+
+ req->cqe.qw0 = cpu_to_le64(wp);
+ req->slba = wp;
+
+ len = req->nlb << nvme_ns_lbads(ns);
+
+ trace_pci_nvme_zone_append(nvme_cid(req), zslba, wp, req->nlb);
+
+ status = nvme_check_rw(n, req);
+ if (status) {
+ goto invalid;
+ }
+
+ status = nvme_check_zone_write(n, req->slba, req->nlb, req, zone);
+ if (status) {
+ goto invalid;
+ }
+
+ switch (nvme_zs(zone)) {
+ case NVME_ZS_ZSE:
+ case NVME_ZS_ZSC:
+ nvme_zs_set(zone, NVME_ZS_ZSIO);
+ default:
+ break;
+ }
+
+ status = nvme_map(n, len, req);
+ if (status) {
+ goto invalid;
+ }
+
+ aio = g_new0(NvmeAIO, 1);
+ *aio = (NvmeAIO) {
+ .opc = NVME_AIO_OPC_WRITE,
+ .blk = ns->blk,
+ .offset = req->slba << nvme_ns_lbads(ns),
+ .req = req,
+ .cb = nvme_aio_zone_write_cb,
+ .cb_arg = zone,
+ };
+
+ if (req->qsg.sg) {
+ aio->len = req->qsg.size;
+ aio->flags |= NVME_AIO_DMA;
+ } else {
+ aio->len = req->iov.size;
+ }
+
+ nvme_req_add_aio(req, aio);
+ nvme_req_set_cb(req, nvme_zone_append_cb, zone);
+
+ zone->wp_staging += req->nlb;
+
+ return NVME_NO_COMPLETE;
+
+invalid:
+ block_acct_invalid(blk_get_stats(ns->blk), BLOCK_ACCT_WRITE);
+ return status;
+}
+
+static uint16_t nvme_zone_append(NvmeCtrl *n, NvmeRequest *req)
+{
+ NvmeZone *zone;
+ NvmeZoneAppendCmd *zappend = (NvmeZoneAppendCmd *) &req->cmd;
+ NvmeNamespace *ns = req->ns;
+ uint64_t zslba = le64_to_cpu(zappend->zslba);
+
+ if (!nvme_ns_zoned(ns)) {
+ return NVME_INVALID_OPCODE | NVME_DNR;
+ }
+
+ if (zslba & (nvme_ns_zsze(ns) - 1)) {
+ trace_pci_nvme_err_invalid_zslba(nvme_cid(req), zslba);
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ req->nlb = le16_to_cpu(zappend->nlb) + 1;
+
+ zone = nvme_ns_get_zone(ns, zslba);
+ if (!zone) {
+ trace_pci_nvme_err_invalid_zone(nvme_cid(req), req->slba);
+ return NVME_INVALID_FIELD | NVME_DNR;
+ }
+
+ return nvme_do_zone_append(n, req, zone);
+}
+
static uint16_t nvme_zone_mgmt_send_close(NvmeCtrl *n, NvmeRequest *req,
NvmeZone *zone)
{
@@ -2142,6 +2246,8 @@ static uint16_t nvme_io_cmd(NvmeCtrl *n, NvmeRequest *req)
return nvme_zone_mgmt_send(n, req);
case NVME_CMD_ZONE_MGMT_RECV:
return nvme_zone_mgmt_recv(n, req);
+ case NVME_CMD_ZONE_APPEND:
+ return nvme_zone_append(n, req);
default:
trace_pci_nvme_err_invalid_opc(req->cmd.opcode);
return NVME_INVALID_OPCODE | NVME_DNR;
@@ -53,6 +53,8 @@ static const NvmeEffectsLog nvme_effects[] = {
[NVME_CMD_ZONE_MGMT_RECV] = NVME_EFFECTS_CSUPP,
[NVME_CMD_ZONE_MGMT_SEND] = NVME_EFFECTS_CSUPP |
NVME_EFFECTS_LBCC,
+ [NVME_CMD_ZONE_APPEND] = NVME_EFFECTS_CSUPP |
+ NVME_EFFECTS_LBCC,
}
},
};
@@ -177,6 +179,7 @@ static inline bool nvme_req_is_write(NvmeRequest *req)
switch (req->cmd.opcode) {
case NVME_CMD_WRITE:
case NVME_CMD_WRITE_ZEROES:
+ case NVME_CMD_ZONE_APPEND:
return true;
default:
return false;
@@ -50,6 +50,8 @@ pci_nvme_admin_cmd(uint16_t cid, uint16_t sqid, uint8_t opcode) "cid %"PRIu16" s
pci_nvme_rw(uint16_t cid, const char *verb, uint32_t nsid, uint32_t nlb, uint64_t count, uint64_t lba) "cid %"PRIu16" %s nsid %"PRIu32" nlb %"PRIu32" count %"PRIu64" lba 0x%"PRIx64""
pci_nvme_rw_cb(uint16_t cid, uint32_t nsid) "cid %"PRIu16" nsid %"PRIu32""
pci_nvme_write_zeroes(uint16_t cid, uint32_t nsid, uint64_t slba, uint32_t nlb) "cid %"PRIu16" nsid %"PRIu32" slba %"PRIu64" nlb %"PRIu32""
+pci_nvme_zone_append(uint16_t cid, uint64_t zslba, uint64_t wp, uint16_t nlb) "cid %"PRIu16" zslba 0x%"PRIx64" wp 0x%"PRIx64" nlb %"PRIu16""
+pci_nvme_zone_append_cb(uint16_t cid, uint64_t slba) "cid %"PRIu16" slba 0x%"PRIx64""
pci_nvme_zone_mgmt_send(uint16_t cid, uint32_t nsid, uint64_t zslba, uint8_t zsa, uint8_t zsflags) "cid %"PRIu16" nsid %"PRIu32" zslba 0x%"PRIx64" zsa 0x%"PRIx8" zsflags 0x%"PRIx8""
pci_nvme_zone_mgmt_send_all(uint16_t cid, uint32_t nsid, uint8_t za) "cid %"PRIu16" nsid %"PRIu32" za 0x%"PRIx8""
pci_nvme_zone_mgmt_send_close(uint16_t cid, uint32_t nsid, uint64_t zslba, const char *zc) "cid %"PRIu16" nsid %"PRIu32" zslba 0x%"PRIx64" zc \"%s\""
Add the Zone Append command. Signed-off-by: Klaus Jensen <k.jensen@samsung.com> --- hw/block/nvme.c | 106 ++++++++++++++++++++++++++++++++++++++++++ hw/block/nvme.h | 3 ++ hw/block/trace-events | 2 + 3 files changed, 111 insertions(+)