| Message ID | 20200701182559.28841-2-aleksandar.qemu.devel@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | target mips: Misc fixes and improvements | expand |
diff --git a/target/mips/cp0_helper.c b/target/mips/cp0_helper.c index bbf12e4a97..de64add038 100644 --- a/target/mips/cp0_helper.c +++ b/target/mips/cp0_helper.c @@ -375,16 +375,9 @@ target_ulong helper_mftc0_entryhi(CPUMIPSState *env) target_ulong helper_mftc0_cause(CPUMIPSState *env) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); - int32_t tccause; CPUMIPSState *other = mips_cpu_map_tc(env, &other_tc); - if (other_tc == other->current_tc) { - tccause = other->CP0_Cause; - } else { - tccause = other->CP0_Cause; - } - - return tccause; + return other->CP0_Cause; } target_ulong helper_mftc0_status(CPUMIPSState *env)
Remove the segment: if (other_tc == other->current_tc) { tccause = other->CP0_Cause; } else { tccause = other->CP0_Cause; } Original contributor can't remember what was his intention. Fixes: 5a25ce9487 ("mips: Hook in more reg accesses via mttr/mftr") Buglink: https://bugs.launchpad.net/qemu/+bug/1885718 Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> --- target/mips/cp0_helper.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-)