From patchwork Thu Jul 2 11:09:22 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Markus Armbruster X-Patchwork-Id: 11638543 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 166E26C1 for ; Thu, 2 Jul 2020 11:16:47 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E1DD12070C for ; Thu, 2 Jul 2020 11:16:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="OQS0hJYe" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E1DD12070C Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:57228 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jqxCw-0002iz-5M for patchwork-qemu-devel@patchwork.kernel.org; Thu, 02 Jul 2020 07:16:46 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52640) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jqx6F-0006qB-Nc for qemu-devel@nongnu.org; Thu, 02 Jul 2020 07:09:51 -0400 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:43095 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_CBC_SHA1:256) (Exim 4.90_1) (envelope-from ) id 1jqx67-00010X-EK for qemu-devel@nongnu.org; Thu, 02 Jul 2020 07:09:51 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1593688182; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=NsvVleU3oj+jAVGYn+RnzLsuXjQBNE36/AcBJekuOdk=; b=OQS0hJYe5MeIiKt/mjKBuecxyAjBvFfIPi+/6xu1hWAK8SQL75s4BdR0+rsu+ge6R3j0fO gWwxfuIWuc+wkXIbh45xNSQn3mLI5W0QcpFKrYRhGcsSt0DqyzL+0daJn3/7NYkp82O8z/ SMgQa972Ihl1AUvpRhvZ8VHdU0QqhSw= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-164-lJq9UQTIMRCSHDwVDhd5Gw-1; Thu, 02 Jul 2020 07:09:40 -0400 X-MC-Unique: lJq9UQTIMRCSHDwVDhd5Gw-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 765D2186A205; Thu, 2 Jul 2020 11:09:38 +0000 (UTC) Received: from blackfin.pond.sub.org (ovpn-112-143.ams2.redhat.com [10.36.112.143]) by smtp.corp.redhat.com (Postfix) with ESMTPS id 11B4873FD4; Thu, 2 Jul 2020 11:09:38 +0000 (UTC) Received: by blackfin.pond.sub.org (Postfix, from userid 1000) id 0DB6E113847F; Thu, 2 Jul 2020 13:09:32 +0200 (CEST) From: Markus Armbruster To: qemu-devel@nongnu.org Subject: [PULL 19/28] riscv/sifive_u: Fix sifive_u_soc_realize() error API violations Date: Thu, 2 Jul 2020 13:09:22 +0200 Message-Id: <20200702110931.2953148-20-armbru@redhat.com> In-Reply-To: <20200702110931.2953148-1-armbru@redhat.com> References: <20200702110931.2953148-1-armbru@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=armbru@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=205.139.110.61; envelope-from=armbru@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/02 03:42:59 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-riscv@nongnu.org, Sagar Karandikar , Bastian Koppelmann , Alistair Francis , Palmer Dabbelt , Bin Meng Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" The Error ** argument must be NULL, &error_abort, &error_fatal, or a pointer to a variable containing NULL. Passing an argument of the latter kind twice without clearing it in between is wrong: if the first call sets an error, it no longer points to NULL for the second call. sifive_u_soc_realize() is wrong that way: it passes &err to sysbus_realize() four times before checking it. Harmless, because the first three can't actually fail (I think). Fix by checking for failure right away. Cc: Palmer Dabbelt Cc: Alistair Francis Cc: Sagar Karandikar Cc: Bastian Koppelmann Cc: Bin Meng Cc: qemu-riscv@nongnu.org Signed-off-by: Markus Armbruster Reviewed-by: Alistair Francis Message-Id: <20200630090351.1247703-18-armbru@redhat.com> --- hw/riscv/sifive_u.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 7d051e7c92..a1d2edfe13 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -677,11 +677,15 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) memmap[SIFIVE_U_CLINT].size, ms->smp.cpus, SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE, false); - sysbus_realize(SYS_BUS_DEVICE(&s->prci), &err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->prci), errp)) { + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->prci), 0, memmap[SIFIVE_U_PRCI].base); qdev_prop_set_uint32(DEVICE(&s->gpio), "ngpio", 16); - sysbus_realize(SYS_BUS_DEVICE(&s->gpio), &err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->gpio), errp)) { + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio), 0, memmap[SIFIVE_U_GPIO].base); /* Pass all GPIOs to the SOC layer so they are available to the board */ @@ -695,7 +699,9 @@ static void sifive_u_soc_realize(DeviceState *dev, Error **errp) } qdev_prop_set_uint32(DEVICE(&s->otp), "serial", s->serial); - sysbus_realize(SYS_BUS_DEVICE(&s->otp), &err); + if (!sysbus_realize(SYS_BUS_DEVICE(&s->otp), errp)) { + return; + } sysbus_mmio_map(SYS_BUS_DEVICE(&s->otp), 0, memmap[SIFIVE_U_OTP].base); if (nd->used) {