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02 Jul 2020 09:21:36 -0700 IronPort-SDR: y0QGL4S9cfC8d+BDCEp/J2vnqONWjP6bD0Fs3y22iK0n1e2Dxd+vchSlyRSQOsOQcRQeiJ3ySc 1PVCPNHBfucg== WDCIronportException: Internal Received: from 6hj08h2.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.58.118]) by uls-op-cesaip01.wdc.com with ESMTP; 02 Jul 2020 09:33:21 -0700 From: Alistair Francis To: peter.maydell@linaro.org, qemu-devel@nongnu.org Subject: [PULL v2 08/64] target/riscv: add an internals.h header Date: Thu, 2 Jul 2020 09:22:58 -0700 Message-Id: <20200702162354.928528-9-alistair.francis@wdc.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200702162354.928528-1-alistair.francis@wdc.com> References: <20200702162354.928528-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.154.42; envelope-from=prvs=4451fe355=alistair.francis@wdc.com; helo=esa4.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/07/02 12:33:30 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Richard Henderson , Alistair Francis , LIU Zhiwei Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" From: LIU Zhiwei The internals.h keeps things that are not relevant to the actual architecture, only to the implementation, separate. Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson Message-Id: <20200701152549.1218-6-zhiwei_liu@c-sky.com> Signed-off-by: Alistair Francis --- target/riscv/internals.h | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) create mode 100644 target/riscv/internals.h diff --git a/target/riscv/internals.h b/target/riscv/internals.h new file mode 100644 index 0000000000..22a49af413 --- /dev/null +++ b/target/riscv/internals.h @@ -0,0 +1,24 @@ +/* + * QEMU RISC-V CPU -- internal functions and types + * + * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2 or later, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see . + */ + +#ifndef RISCV_CPU_INTERNALS_H +#define RISCV_CPU_INTERNALS_H + +#include "hw/registerfields.h" + +#endif