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That's all we know. X-Spam_score_int: -5 X-Spam_score: -0.6 X-Spam_bar: / X-Spam_report: (-0.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, FROM_LOCAL_NOVOWEL=0.5, HK_RANDOM_ENVFROM=0.001, HK_RANDOM_FROM=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , =?utf-8?q?Alex_Benn=C3=A9e?= , Peter Maydell Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Pass float_status structure pointer to the pickNaN so that machine-specific settings are available to NaN selection code. Add use_first_nan property to float_status and use it in Xtensa-specific pickNaN. Cc: Peter Maydell Cc: "Alex Bennée" Signed-off-by: Max Filippov Reviewed-by: Alex Bennée --- fpu/softfloat-specialize.inc.c | 30 ++++++++++++++++++++++++------ fpu/softfloat.c | 2 +- include/fpu/softfloat-helpers.h | 5 +++++ include/fpu/softfloat-types.h | 1 + 4 files changed, 31 insertions(+), 7 deletions(-) diff --git a/fpu/softfloat-specialize.inc.c b/fpu/softfloat-specialize.inc.c index b26bc039b0b6..e17327b405c5 100644 --- a/fpu/softfloat-specialize.inc.c +++ b/fpu/softfloat-specialize.inc.c @@ -368,7 +368,7 @@ static float32 commonNaNToFloat32(commonNaNT a, float_status *status) *----------------------------------------------------------------------------*/ static int pickNaN(FloatClass a_cls, FloatClass b_cls, - bool aIsLargerSignificand) + bool aIsLargerSignificand, float_status *status) { #if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) /* ARM mandated NaN propagation rules (see FPProcessNaNs()), take @@ -401,7 +401,7 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls, } else { return 1; } -#elif defined(TARGET_PPC) || defined(TARGET_XTENSA) || defined(TARGET_M68K) +#elif defined(TARGET_PPC) || defined(TARGET_M68K) /* PowerPC propagation rules: * 1. A if it sNaN or qNaN * 2. B if it sNaN or qNaN @@ -426,6 +426,24 @@ static int pickNaN(FloatClass a_cls, FloatClass b_cls, } else { return 1; } +#elif defined(TARGET_XTENSA) + /* + * Xtensa has two NaN propagation modes. + * Which one is active is controlled by float_status::use_first_nan. + */ + if (status->use_first_nan) { + if (is_nan(a_cls)) { + return 0; + } else { + return 1; + } + } else { + if (is_nan(b_cls)) { + return 1; + } else { + return 0; + } + } #else /* This implements x87 NaN propagation rules: * SNaN + QNaN => return the QNaN @@ -613,7 +631,7 @@ static float32 propagateFloat32NaN(float32 a, float32 b, float_status *status) aIsLargerSignificand = (av < bv) ? 1 : 0; } - if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) { if (is_snan(b_cls)) { return float32_silence_nan(b, status); } @@ -751,7 +769,7 @@ static float64 propagateFloat64NaN(float64 a, float64 b, float_status *status) aIsLargerSignificand = (av < bv) ? 1 : 0; } - if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) { if (is_snan(b_cls)) { return float64_silence_nan(b, status); } @@ -915,7 +933,7 @@ floatx80 propagateFloatx80NaN(floatx80 a, floatx80 b, float_status *status) aIsLargerSignificand = (a.high < b.high) ? 1 : 0; } - if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) { if (is_snan(b_cls)) { return floatx80_silence_nan(b, status); } @@ -1063,7 +1081,7 @@ static float128 propagateFloat128NaN(float128 a, float128 b, aIsLargerSignificand = (a.high < b.high) ? 1 : 0; } - if (pickNaN(a_cls, b_cls, aIsLargerSignificand)) { + if (pickNaN(a_cls, b_cls, aIsLargerSignificand, status)) { if (is_snan(b_cls)) { return float128_silence_nan(b, status); } diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 5e9746c2876f..a89056a1816e 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -881,7 +881,7 @@ static FloatParts pick_nan(FloatParts a, FloatParts b, float_status *s) } else { if (pickNaN(a.cls, b.cls, a.frac > b.frac || - (a.frac == b.frac && a.sign < b.sign))) { + (a.frac == b.frac && a.sign < b.sign), s)) { a = b; } if (is_snan(a.cls)) { diff --git a/include/fpu/softfloat-helpers.h b/include/fpu/softfloat-helpers.h index e842f83a1285..2f0674fbddec 100644 --- a/include/fpu/softfloat-helpers.h +++ b/include/fpu/softfloat-helpers.h @@ -95,6 +95,11 @@ static inline void set_snan_bit_is_one(bool val, float_status *status) status->snan_bit_is_one = val; } +static inline void set_use_first_nan(bool val, float_status *status) +{ + status->use_first_nan = val; +} + static inline void set_no_signaling_nans(bool val, float_status *status) { status->no_signaling_nans = val; diff --git a/include/fpu/softfloat-types.h b/include/fpu/softfloat-types.h index 10bd208e559f..aaee6e4cdd23 100644 --- a/include/fpu/softfloat-types.h +++ b/include/fpu/softfloat-types.h @@ -167,6 +167,7 @@ typedef struct float_status { bool default_nan_mode; /* not always used -- see snan_bit_is_one() in softfloat-specialize.h */ bool snan_bit_is_one; + bool use_first_nan; bool no_signaling_nans; } float_status;