Message ID | 20200828092413.22206-19-peter.maydell@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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[81.2.115.148]) by smtp.gmail.com with ESMTPSA id t13sm912304wru.65.2020.08.28.02.24.34 for <qemu-devel@nongnu.org> (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 28 Aug 2020 02:24:34 -0700 (PDT) From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 18/35] armsse: Define ARMSSEClass correctly Date: Fri, 28 Aug 2020 10:23:56 +0100 Message-Id: <20200828092413.22206-19-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20200828092413.22206-1-peter.maydell@linaro.org> References: <20200828092413.22206-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x32a.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. 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Series |
[PULL,01/35] hw/arm/sbsa-ref: fix typo breaking PCIe IRQs
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diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h index 84080c22993..b10173beabd 100644 --- a/include/hw/arm/armsse.h +++ b/include/hw/arm/armsse.h @@ -220,7 +220,7 @@ typedef struct ARMSSE { typedef struct ARMSSEInfo ARMSSEInfo; typedef struct ARMSSEClass { - DeviceClass parent_class; + SysBusDeviceClass parent_class; const ARMSSEInfo *info; } ARMSSEClass; diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c index dcbff9bd8f4..6381bbd94d6 100644 --- a/hw/arm/armsse.c +++ b/hw/arm/armsse.c @@ -1160,6 +1160,7 @@ static const TypeInfo armsse_info = { .name = TYPE_ARMSSE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(ARMSSE), + .class_size = sizeof(ARMSSEClass), .instance_init = armsse_init, .abstract = true, .interfaces = (InterfaceInfo[]) {