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Wed, 02 Sep 2020 21:35:00 +0200 From: Helge Deller To: qemu-devel@nongnu.org Subject: [PATCH v3 2/8] hw/hppa: Make number of TLB and BTLB entries configurable Date: Wed, 2 Sep 2020 21:34:50 +0200 Message-Id: <20200902193456.29844-3-deller@gmx.de> X-Mailer: git-send-email 2.21.3 In-Reply-To: <20200902193456.29844-1-deller@gmx.de> References: <20200902193456.29844-1-deller@gmx.de> MIME-Version: 1.0 X-Provags-ID: V03:K1:Eq+qlrFqou3tTLt0tQvecHekV1/8xrWs1MYz7//WVH/aw3St+T3 fbGEHyY5vLhA+M9MbxYTdjFd/7pon4ImUw+iCD31OB86WxmsUxj0irSbQong3pzPr7D/R0N GeU71/x051olHdUwSUx3MU1os0Xs8sNmyMexH5obDfi2jOzEuyCBqjOSYTPxCbHiYYWB//n PpxK1cTZqKD/MejkWz+MQ== X-UI-Out-Filterresults: notjunk:1;V03:K0:4DHgr65x744=:rOA0LBgHUVhu/rDeCVIEUz 9AG0+Del8VaYOMpldWYGrK8s/tbroCxfSuXzxYPfNsHM9S0XSK1ELJSSBdo7e+0GBHvLphsM/ +gIRNlLcpaJ7YgupAcxwPCtBIZZOhHJv07kcCSuin3KyObHtgT+eSvFqGTPBCGjb012beSVYO c/RcH9z7+Kg70giJtCDMs9NbbLcyX2NmEz7/CZOICkYPDFelNxoDspwqbFGpUgRRc1c6ugyE1 MtrquHHCq4AgDGb/IBMN9KcfKfVu8efUoFxpocRxf17cb4c/xUWSjB/uwIthNoDLqdUMDAN54 wV+jPLEyLEmhsGMusGFBsbYrEowuMG8OTU0+TF5VDxF9IZsk2ncn5bxIiqRrrAC/UpOQtZors 3by9R2jpPdulm4PdUvjdZX2Xos3fbUmM8rq9XaLEqkcb2bR0hHMtvcJ1B+dA3kHYdEU5jWs/c V52n7RFbvUUxeVqeD+/ZrcOhhIJrVd36tkggprOXIa7eALyYj7wMEIoOuNSIG978uyxtFO1AL wVE5SqAbaTXhRIhUBVwrSD63lT6nTgVx32O3+Jh0IMEcs4u8KjitW/oJUye3LyZIhh5CbzKxf o2ppCUin5p2HNj1kgGu7yJkHB65xrLijKjHpgfcFfYbfemw3VwifOi7rSAkMEvba0d5Lngs2q Zu4k0BWAL7SlZWlPYB91C7es9sYvyGlrRoVUlPLAwmRHj5uEMQpeztPkJuoTSnVE/g6VDMov5 n8Bq09UnK+PY5a45HGgRD2bFFSK5g0LPu3NkZ+jYOsih8oSJAb1Yih8WYKius/hL6mUGlogNq jzYo7uJEEH99LZMwFpkTZEW2U/6lFFzQfi/VxSVnjg4G3DWP7yU7sPFYno090JVkC+XZMTzGN NJO/GBS0NDLw2P5jKCNwuaRqZ7MwxKmNM3eKB3M2s+9NEzo0rFcdbJj+e+r9TLY28C1f6DuE1 3vJTJMFB3Rb8cMzy+oNE/9zlUWisSeOGrydlRTDgsN8WWeiickdZvHHpECJ5nA1c+1RTeNqUA beUwXwNOzAu7Qr5HHanDuoubXWei9MJXC0tK/qfW+9S38afIErBp+T5m5KY2uuNj1Nk4k233g 5bQcl9OU5mQl3mQzmID3PJgGfXWQKdSrJA0ZIdKBvDmbMB+/ZEJ+eZJEIEadLyAqRonTtxsx8 V856UadEQd1A5d/zwXt5liE3JG+HVJVI8Ex97iMxAZ8Cbueqf3L3pAz2CuGmS79CL262oP3Io QevUCnYsWbShPLY5c Received-SPF: pass client-ip=212.227.15.15; envelope-from=deller@gmx.de; helo=mout.gmx.net X-detected-operating-system: by eggs.gnu.org: First seen = 2020/09/02 15:35:12 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Helge Deller , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Until now the TLB size was fixed at 256 entries. To allow operating systems to utilize more TLB entries in the future, we need to tell firmware how many TLB entries we actually support in the emulation. Firmware then reports this to the operating system via the PDC_CACHE_INFO call. This patch simply does the preparation to allow more TLB entries. Signed-off-by: Helge Deller --- hw/hppa/machine.c | 8 ++++++++ target/hppa/cpu.h | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) -- 2.21.3 diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 90aeefe2a4..e9d84d0f03 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms) fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", g_memdup(&val, sizeof(val)), sizeof(val)); + val = cpu_to_le64(HPPA_TLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + + val = cpu_to_le64(HPPA_BTLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + return fw_cfg; } diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 801a4fb1ba..fb6c59d075 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -196,9 +196,12 @@ struct CPUHPPAState { target_ureg shadow[7]; /* shadow registers */ /* ??? The number of entries isn't specified by the architecture. */ +#define HPPA_TLB_ENTRIES 256 +#define HPPA_BTLB_ENTRIES 0 + /* ??? Implement a unified itlb/dtlb for the moment. */ /* ??? We should use a more intelligent data structure. */ - hppa_tlb_entry tlb[256]; + hppa_tlb_entry tlb[HPPA_TLB_ENTRIES]; uint32_t tlb_last; };