diff mbox series

[v3,4/8] hw/hppa: Change fw_cfg port address

Message ID 20200902193456.29844-5-deller@gmx.de (mailing list archive)
State New, archived
Headers show
Series hppa: power button support, artist graphics fixes, firmware fixes, ... | expand

Commit Message

Helge Deller Sept. 2, 2020, 7:34 p.m. UTC
Devices on hppa occupy at least 4k starting at the HPA, so MEMORY_HPA+4k is
blocked (by Linux) for the memory module.  I noticed this when testing the new
Linux kernel patch to let the fw_cfg entries show up in Linux under /proc.
The Linux kernel driver could not allocate the region for fw_cfg.
This new base address seems to not conflict.

Signed-off-by: Helge Deller <deller@gmx.de>
---
 hw/hppa/hppa_hardware.h | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

--
2.21.3

Comments

Richard Henderson Sept. 2, 2020, 8:42 p.m. UTC | #1
On 9/2/20 12:34 PM, Helge Deller wrote:
> Devices on hppa occupy at least 4k starting at the HPA, so MEMORY_HPA+4k is
> blocked (by Linux) for the memory module.  I noticed this when testing the new
> Linux kernel patch to let the fw_cfg entries show up in Linux under /proc.
> The Linux kernel driver could not allocate the region for fw_cfg.
> This new base address seems to not conflict.
> 
> Signed-off-by: Helge Deller <deller@gmx.de>
> ---
>  hw/hppa/hppa_hardware.h | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
> index cdb7fa6240..b2fbbc2eec 100644
> --- a/hw/hppa/hppa_hardware.h
> +++ b/hw/hppa/hppa_hardware.h
> @@ -38,8 +38,7 @@
>  #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
>  #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)
> 
> -/* QEMU fw_cfg interface port */
> -#define QEMU_FW_CFG_IO_BASE     (MEMORY_HPA + 0x80)
> +#define QEMU_FW_CFG_IO_BASE     0xfffa0000
> 
>  #define PORT_SERIAL1    (DINO_UART_HPA + 0x800)
>  #define PORT_SERIAL2    (LASI_UART_HPA + 0x800)

I guess this is ok.  Moving this up a few lines, with the other HPA, and
sorting, would make this more obvious.

I see that, because HPPA_MAX_CPUS = 8, that CPU_HPA covers 0xfffb000 -
0xfffb7fff.  Thus there is also 7 slots available between the end of CPU_HPA
and MEMORY_HPA.  Picking 0xfffbe000 might be better than blocking a possible
64k slot.

But either way,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
diff mbox series

Patch

diff --git a/hw/hppa/hppa_hardware.h b/hw/hppa/hppa_hardware.h
index cdb7fa6240..b2fbbc2eec 100644
--- a/hw/hppa/hppa_hardware.h
+++ b/hw/hppa/hppa_hardware.h
@@ -38,8 +38,7 @@ 
 #define PORT_PCI_CMD    (PCI_HPA + DINO_PCI_ADDR)
 #define PORT_PCI_DATA   (PCI_HPA + DINO_CONFIG_DATA)

-/* QEMU fw_cfg interface port */
-#define QEMU_FW_CFG_IO_BASE     (MEMORY_HPA + 0x80)
+#define QEMU_FW_CFG_IO_BASE     0xfffa0000

 #define PORT_SERIAL1    (DINO_UART_HPA + 0x800)
 #define PORT_SERIAL2    (LASI_UART_HPA + 0x800)