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[83.53.161.74]) by smtp.gmail.com with ESMTPSA id z67sm464787wme.41.2020.09.28.10.15.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Sep 2020 10:15:47 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 04/16] target/mips/cpu: Introduce mips_cpu_properties[] Date: Mon, 28 Sep 2020 19:15:27 +0200 Message-Id: <20200928171539.788309-5-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200928171539.788309-1-f4bug@amsat.org> References: <20200928171539.788309-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x335.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -15 X-Spam_score: -1.6 X-Spam_bar: - X-Spam_report: (-1.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.199, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Damien Hedde , Huacai Chen , Aleksandar Rikalo , Eduardo Habkost , Paul Burton , "Edgar E . Iglesias" , =?utf-8?q?Philippe_Mathieu?= =?utf-8?q?-Daud=C3=A9?= , Wainer dos Santos Moschetta , Aleksandar Markovic , =?utf-8?q?Herv=C3=A9?= =?utf-8?q?_Poussineau?= , Cleber Rosa , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aurelien Jarno , Richard Henderson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" To allow objects creating CPU objects to set non-default properties before qdev-realizing() it, add an empty mips_cpu_properties array in MIPSCPUClass. Signed-off-by: Philippe Mathieu-Daudé --- target/mips/cpu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd065483..c1c0f2e12ba 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -26,7 +26,7 @@ #include "qemu/module.h" #include "sysemu/kvm.h" #include "exec/exec-all.h" - +#include "hw/qdev-properties.h" static void mips_cpu_set_pc(CPUState *cs, vaddr value) { @@ -181,6 +181,10 @@ static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) return oc; } +static Property mips_cpu_properties[] = { + DEFINE_PROP_END_OF_LIST() +}; + static void mips_cpu_class_init(ObjectClass *c, void *data) { MIPSCPUClass *mcc = MIPS_CPU_CLASS(c); @@ -190,6 +194,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) device_class_set_parent_realize(dc, mips_cpu_realizefn, &mcc->parent_realize); device_class_set_parent_reset(dc, mips_cpu_reset, &mcc->parent_reset); + device_class_set_props(dc, mips_cpu_properties); cc->class_by_name = mips_cpu_class_by_name; cc->has_work = mips_cpu_has_work;