From patchwork Mon Nov 9 03:04:50 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: fangying X-Patchwork-Id: 11890415 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 43F18697 for ; Mon, 9 Nov 2020 03:11:35 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id E44B8206B7 for ; Mon, 9 Nov 2020 03:11:34 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org E44B8206B7 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=huawei.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:35484 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kbxaf-0002dG-Ua for patchwork-qemu-devel@patchwork.kernel.org; Sun, 08 Nov 2020 22:11:33 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44796) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kbxUs-0001bM-TJ; Sun, 08 Nov 2020 22:05:34 -0500 Received: from szxga04-in.huawei.com ([45.249.212.190]:2400) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kbxUn-0006jR-KE; Sun, 08 Nov 2020 22:05:34 -0500 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.58]) by szxga04-in.huawei.com (SkyGuard) with ESMTP id 4CTwpm0RnVz15SkF; Mon, 9 Nov 2020 11:05:20 +0800 (CST) Received: from localhost (10.174.186.67) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.487.0; Mon, 9 Nov 2020 11:05:17 +0800 From: Ying Fang To: Subject: [RFC PATCH v3 11/13] hw/arm/virt: add fdt cache information Date: Mon, 9 Nov 2020 11:04:50 +0800 Message-ID: <20201109030452.2197-12-fangying1@huawei.com> X-Mailer: git-send-email 2.28.0.windows.1 In-Reply-To: <20201109030452.2197-1-fangying1@huawei.com> References: <20201109030452.2197-1-fangying1@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.174.186.67] X-CFilter-Loop: Reflected Received-SPF: pass client-ip=45.249.212.190; envelope-from=fangying1@huawei.com; helo=szxga04-in.huawei.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/11/08 22:05:17 X-ACL-Warn: Detected OS = Linux 3.1-3.10 [fuzzy] X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: drjones@redhat.com, zhang.zhanghailiang@huawei.com, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, qemu-arm@nongnu.org, alistair.francis@wdc.com, Ying Fang , imammedo@redhat.com, salil.mehta@huawei.com Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Support devicetree cpu cache information descriptions Signed-off-by: Ying Fang --- hw/arm/virt.c | 92 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index b6cebb5549..21275e03c2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -346,6 +346,89 @@ static void fdt_add_timer_nodes(const VirtMachineState *vms) GIC_FDT_IRQ_TYPE_PPI, ARCH_TIMER_NS_EL2_IRQ, irqflags); } +static void fdt_add_l3cache_nodes(const VirtMachineState *vms) +{ + int i; + const MachineState *ms = MACHINE(vms); + ARMCPU *cpu = ARM_CPU(first_cpu); + unsigned int smp_cores = ms->smp.cores; + unsigned int sockets = ms->smp.max_cpus / smp_cores; + + for (i = 0; i < sockets; i++) { + char *nodename = g_strdup_printf("/cpus/l3-cache%d", i); + qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cache"); + qemu_fdt_setprop_string(vms->fdt, nodename, "cache-unified", "true"); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-level", 3); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-size", + cpu->caches.l3_cache->size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-line-size", + cpu->caches.l3_cache->line_size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-sets", + cpu->caches.l3_cache->sets); + qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", + qemu_fdt_alloc_phandle(vms->fdt)); + g_free(nodename); + } +} + +static void fdt_add_l2cache_nodes(const VirtMachineState *vms) +{ + int i, j; + const MachineState *ms = MACHINE(vms); + unsigned int smp_cores = ms->smp.cores; + signed int sockets = ms->smp.max_cpus / smp_cores; + ARMCPU *cpu = ARM_CPU(first_cpu); + + for (i = 0; i < sockets; i++) { + char *next_path = g_strdup_printf("/cpus/l3-cache%d", i); + for (j = 0; j < smp_cores; j++) { + char *nodename = g_strdup_printf("/cpus/l2-cache%d", + i * smp_cores + j); + qemu_fdt_add_subnode(vms->fdt, nodename); + qemu_fdt_setprop_string(vms->fdt, nodename, "compatible", "cache"); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-size", + cpu->caches.l2_cache->size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-line-size", + cpu->caches.l2_cache->line_size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "cache-sets", + cpu->caches.l2_cache->sets); + qemu_fdt_setprop_phandle(vms->fdt, nodename, + "next-level-cache", next_path); + qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", + qemu_fdt_alloc_phandle(vms->fdt)); + g_free(nodename); + } + g_free(next_path); + } +} + +static void fdt_add_l1cache_prop(const VirtMachineState *vms, + char *nodename, int cpu_index) +{ + + ARMCPU *cpu = ARM_CPU(qemu_get_cpu(cpu_index)); + CPUCaches caches = cpu->caches; + + char *cachename = g_strdup_printf("/cpus/l2-cache%d", cpu_index); + + qemu_fdt_setprop_cell(vms->fdt, nodename, "d-cache-size", + caches.l1d_cache->size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "d-cache-line-size", + caches.l1d_cache->line_size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "d-cache-sets", + caches.l1d_cache->sets); + qemu_fdt_setprop_cell(vms->fdt, nodename, "i-cache-size", + caches.l1i_cache->size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "i-cache-line-size", + caches.l1i_cache->line_size); + qemu_fdt_setprop_cell(vms->fdt, nodename, "i-cache-sets", + caches.l1i_cache->sets); + qemu_fdt_setprop_phandle(vms->fdt, nodename, "next-level-cache", + cachename); + g_free(cachename); +} + static void fdt_add_cpu_nodes(const VirtMachineState *vms) { int cpu; @@ -379,6 +462,11 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#address-cells", addr_cells); qemu_fdt_setprop_cell(vms->fdt, "/cpus", "#size-cells", 0x0); + if (!vmc->ignore_cpu_topology) { + fdt_add_l3cache_nodes(vms); + fdt_add_l2cache_nodes(vms); + } + for (cpu = ms->smp.cpus - 1; cpu >= 0; cpu--) { char *nodename = g_strdup_printf("/cpus/cpu@%d", cpu); ARMCPU *armcpu = ARM_CPU(qemu_get_cpu(cpu)); @@ -408,6 +496,10 @@ static void fdt_add_cpu_nodes(const VirtMachineState *vms) ms->possible_cpus->cpus[cs->cpu_index].props.node_id); } + if (!vmc->ignore_cpu_topology) { + fdt_add_l1cache_prop(vms, nodename, cpu); + } + if (ms->smp.cpus > 1 && !vmc->ignore_cpu_topology) { qemu_fdt_setprop_cell(vms->fdt, nodename, "phandle", qemu_fdt_alloc_phandle(vms->fdt));