@@ -672,6 +672,8 @@ elif check_define __arm__ ; then
cpu="arm"
elif check_define __aarch64__ ; then
cpu="aarch64"
+elif check_define __arc__ ; then
+ cpu="arc"
else
cpu=$(uname -m)
fi
new file mode 100644
@@ -0,0 +1,5 @@
+# Default configuration for arc-softmmu
+
+CONFIG_VIRTIO_MMIO=y
+CONFIG_SERIAL=y
+CONFIG_OPENCORES_ETH=y
new file mode 100644
@@ -0,0 +1,7 @@
+# Default configuration for arc-softmmu
+
+CONFIG_SEMIHOSTING=n
+
+# Boards:
+#
+CONFIG_ARC_VIRT=y
new file mode 100644
@@ -0,0 +1,2 @@
+TARGET_ARCH=arc
+TARGET_XML_FILES= gdb-xml/arc-v2-core.xml gdb-xml/arc-v2-aux.xml gdb-xml/arc-v2-other.xml
@@ -208,6 +208,8 @@ static void initialize_debug_host(CPUDebug *s)
s->info.cap_insn_split = 6;
#elif defined(__hppa__)
s->info.print_insn = print_insn_hppa;
+#elif defined(__arc__)
+ s->info.print_insn = print_insn_arc;
#endif
}
@@ -4,6 +4,7 @@ subdir('libvixl')
common_ss.add(when: 'CONFIG_ALPHA_DIS', if_true: files('alpha.c'))
common_ss.add(when: 'CONFIG_ARM_A64_DIS', if_true: files('arm-a64.cc'))
common_ss.add_all(when: 'CONFIG_ARM_A64_DIS', if_true: libvixl_ss)
+common_ss.add(when: 'CONFIG_ARC_DIS', if_true: files('arc.c'))
common_ss.add(when: 'CONFIG_ARM_DIS', if_true: files('arm.c'))
common_ss.add(when: 'CONFIG_CRIS_DIS', if_true: files('cris.c'))
common_ss.add(when: 'CONFIG_HPPA_DIS', if_true: files('hppa.c'))
@@ -41,6 +41,7 @@ source vfio/Kconfig
source watchdog/Kconfig
# arch Kconfig
+source arc/Kconfig
source arm/Kconfig
source alpha/Kconfig
source avr/Kconfig
new file mode 100644
@@ -0,0 +1,7 @@
+config ARC_VIRT
+ bool
+ select SERIAL
+ select VIRTIO_MMIO
+
+config ARC
+ bool
deleted file mode 100644
@@ -1,21 +0,0 @@
-#
-# QEMU ARC CPU
-#
-# Copyright (c) 2019
-#
-# This library is free software; you can redistribute it and/or
-# modify it under the terms of the GNU Lesser General Public
-# License as published by the Free Software Foundation; either
-# version 2.1 of the License, or (at your option) any later version.
-#
-# This library is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
-# Lesser General Public License for more details.
-#
-# You should have received a copy of the GNU Lesser General Public
-# License along with this library; if not, see
-# http://www.gnu.org/licenses/lgpl-2.1.html
-#
-
-obj-y = arc_sim.o arc_uart.o sample.o pic_cpu.o boot.o board-hsdk.o sim-hs.o nsim.o
@@ -1,13 +1,9 @@
arc_ss = ss.source_set()
arc_ss.add(files(
'arc_sim.c',
- 'arc_uart.c',
- 'sample.c',
'pic_cpu.c',
'boot.c',
- 'board-hsdk.c',
- 'sim-hs.c',
- 'nsim.c',
))
+arc_ss.add(when: 'CONFIG_ARC_VIRT', if_true: files('virt.c'))
hw_arch += {'arc': arc_ss}
@@ -43,6 +43,7 @@ subdir('xen')
subdir('xenpv')
subdir('alpha')
+subdir('arc')
subdir('arm')
subdir('avr')
subdir('cris')
@@ -206,7 +206,14 @@ enum bfd_architecture
bfd_arch_v850, /* NEC V850 */
#define bfd_mach_v850 0
bfd_arch_arc, /* Argonaut RISC Core */
-#define bfd_mach_arc_base 0
+#define bfd_mach_arc_a4 0
+#define bfd_mach_arc_a5 1
+#define bfd_mach_arc_arc600 2
+#define bfd_mach_arc_arc601 4
+#define bfd_mach_arc_arc700 3
+#define bfd_mach_arc_arcv2 5
+#define bfd_mach_arc_arcv2em 6
+#define bfd_mach_arc_arcv2hs 7
bfd_arch_m32r, /* Mitsubishi M32R/D */
#define bfd_mach_m32r 0 /* backwards compatibility */
bfd_arch_mn10200, /* Matsushita MN10200 */
@@ -459,6 +466,7 @@ int print_insn_xtensa (bfd_vma, disassemble_info*);
int print_insn_riscv32 (bfd_vma, disassemble_info*);
int print_insn_riscv64 (bfd_vma, disassemble_info*);
int print_insn_rx(bfd_vma, disassemble_info *);
+int print_insn_arc (bfd_vma, disassemble_info*);
#ifdef CONFIG_CAPSTONE
bool cap_disas_target(disassemble_info *info, uint64_t pc, size_t size);
@@ -207,6 +207,9 @@ typedef struct mips_elf_abiflags_v0 {
#define EM_TILEGX 191 /* TILE-Gx */
+#define EM_ARC_COMPACT 93 /* Synopsys ARCompact */
+#define EM_ARC_COMPACT2 195 /* Synopsys ARCompact V2 */
+
#define EM_MOXIE 223 /* Moxie processor family */
#define EM_MOXIE_OLD 0xFEED
@@ -9,6 +9,7 @@
#pragma GCC poison TARGET_X86_64
#pragma GCC poison TARGET_AARCH64
#pragma GCC poison TARGET_ALPHA
+#pragma GCC poison TARGET_ARC
#pragma GCC poison TARGET_ARM
#pragma GCC poison TARGET_CRIS
#pragma GCC poison TARGET_HPPA
@@ -70,6 +71,7 @@
#pragma GCC poison CONFIG_ALPHA_DIS
#pragma GCC poison CONFIG_ARM_A64_DIS
+#pragma GCC poison CONFIG_ARC_DIS
#pragma GCC poison CONFIG_ARM_DIS
#pragma GCC poison CONFIG_CRIS_DIS
#pragma GCC poison CONFIG_HPPA_DIS
@@ -26,6 +26,7 @@ enum {
QEMU_ARCH_RISCV = (1 << 19),
QEMU_ARCH_RX = (1 << 20),
QEMU_ARCH_AVR = (1 << 21),
+ QEMU_ARCH_ARC = (1 << 22),
QEMU_ARCH_NONE = (1 << 31),
};
@@ -53,8 +53,8 @@ have_block = have_system or have_tools
python = import('python').find_installation()
supported_oses = ['windows', 'freebsd', 'netbsd', 'openbsd', 'darwin', 'sunos', 'linux']
-supported_cpus = ['ppc', 'ppc64', 's390x', 'riscv32', 'riscv64', 'x86', 'x86_64',
- 'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64']
+supported_cpus = ['ppc', 'ppc64', 's390x', 'sparc64', 'riscv32', 'riscv64', 'x86', 'x86_64',
+ 'arc', 'arm', 'aarch64', 'mips', 'mips64', 'sparc', 'sparc64']
cpu = host_machine.cpu_family()
targetos = host_machine.system()
@@ -827,6 +827,7 @@ config_target_mak = {}
disassemblers = {
'alpha' : ['CONFIG_ALPHA_DIS'],
+ 'arc' : ['CONFIG_ARC_DIS'],
'arm' : ['CONFIG_ARM_DIS'],
'avr' : ['CONFIG_AVR_DIS'],
'cris' : ['CONFIG_CRIS_DIS'],
@@ -92,6 +92,8 @@ int graphic_depth = 32;
#define QEMU_ARCH QEMU_ARCH_XTENSA
#elif defined(TARGET_AVR)
#define QEMU_ARCH QEMU_ARCH_AVR
+#elif defined(TARGET_ARC)
+#define QEMU_ARCH QEMU_ARCH_ARC
#endif
const uint32_t arch_type = QEMU_ARCH;
@@ -1,4 +1,5 @@
subdir('alpha')
+subdir('arc')
subdir('arm')
subdir('avr')
subdir('cris')