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[131.111.193.104]) by smtp.gmail.com with ESMTPSA id u203sm468594wme.32.2020.11.16.12.13.31 (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 16 Nov 2020 12:13:31 -0800 (PST) Received: by Jessicas-MacBook.local (Postfix, from userid 501) id 8D59720985F670; Mon, 16 Nov 2020 20:13:31 +0000 (GMT) From: Jessica Clarke To: qemu-devel@nongnu.org Subject: [PATCH] hvf: Fix value of MMU_PAGE_NX and add MMU_PAGE_RS Date: Mon, 16 Nov 2020 20:13:22 +0000 Message-Id: <20201116201322.29262-1-jrtc27@jrtc27.com> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::442; envelope-from=jrtc27@jrtc27.com; helo=mail-wr1-x442.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Richard Henderson , Cameron Esfahani , Roman Bolshakov , Paolo Bonzini , Jessica Clarke Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" These are meant to correspond to the error code reported for #PF, so fix the definition for Instruction Fetch faults and add one for Reserved Bit faults (checking for that is currently a TODO in x86_mmu.c). Signed-off-by: Jessica Clarke Reviewed-by: Roman Bolshakov --- target/i386/hvf/x86_mmu.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/i386/hvf/x86_mmu.h b/target/i386/hvf/x86_mmu.h index cd6e137e79..710adb82b5 100644 --- a/target/i386/hvf/x86_mmu.h +++ b/target/i386/hvf/x86_mmu.h @@ -34,7 +34,8 @@ #define MMU_PAGE_PT (1 << 0) #define MMU_PAGE_WT (1 << 1) #define MMU_PAGE_US (1 << 2) -#define MMU_PAGE_NX (1 << 3) +#define MMU_PAGE_RS (1 << 3) +#define MMU_PAGE_NX (1 << 4) bool mmu_gva_to_gpa(struct CPUState *cpu, target_ulong gva, uint64_t *gpa);