Message ID | 20201208194839.31305-17-cfontana@suse.de (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | i386 cleanup | expand |
On Tue, Dec 8, 2020 at 12:52 PM Claudio Fontana <cfontana@suse.de> wrote: > > for now only TCG is allowed as an accelerator for riscv, > so remove the CONFIG_TCG use. > > Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > target/riscv/cpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index a52e0ce466..27dd1645c9 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -561,10 +561,9 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) > /* For now, mark unmigratable: */ > cc->vmsd = &vmstate_riscv_cpu; > #endif > -#ifdef CONFIG_TCG > cc->tcg_ops.initialize = riscv_translate_init; > cc->tlb_fill = riscv_cpu_tlb_fill; > -#endif > + > device_class_set_props(dc, riscv_cpu_properties); > } > > -- > 2.26.2 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index a52e0ce466..27dd1645c9 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -561,10 +561,9 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) /* For now, mark unmigratable: */ cc->vmsd = &vmstate_riscv_cpu; #endif -#ifdef CONFIG_TCG cc->tcg_ops.initialize = riscv_translate_init; cc->tlb_fill = riscv_cpu_tlb_fill; -#endif + device_class_set_props(dc, riscv_cpu_properties); }
for now only TCG is allowed as an accelerator for riscv, so remove the CONFIG_TCG use. Signed-off-by: Claudio Fontana <cfontana@suse.de> --- target/riscv/cpu.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)