diff mbox series

[v11,16/25] target/riscv: remove CONFIG_TCG, as it is always TCG

Message ID 20201211083143.14350-17-cfontana@suse.de (mailing list archive)
State New, archived
Headers show
Series i386 cleanup PART 1 | expand

Commit Message

Claudio Fontana Dec. 11, 2020, 8:31 a.m. UTC
for now only TCG is allowed as an accelerator for riscv,
so remove the CONFIG_TCG use.

Signed-off-by: Claudio Fontana <cfontana@suse.de>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Richard Henderson Dec. 11, 2020, 4:56 p.m. UTC | #1
On 12/11/20 2:31 AM, Claudio Fontana wrote:
> for now only TCG is allowed as an accelerator for riscv,
> so remove the CONFIG_TCG use.
> 
> Signed-off-by: Claudio Fontana <cfontana@suse.de>
> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
> ---
>  target/riscv/cpu.c | 3 +--
>  1 file changed, 1 insertion(+), 2 deletions(-)

Aren't there patches on the list to add kvm support for riscv?


r~
Claudio Fontana Dec. 11, 2020, 5:19 p.m. UTC | #2
On 12/11/20 5:56 PM, Richard Henderson wrote:
> On 12/11/20 2:31 AM, Claudio Fontana wrote:
>> for now only TCG is allowed as an accelerator for riscv,
>> so remove the CONFIG_TCG use.
>>
>> Signed-off-by: Claudio Fontana <cfontana@suse.de>
>> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
>> ---
>>  target/riscv/cpu.c | 3 +--
>>  1 file changed, 1 insertion(+), 2 deletions(-)
> 
> Aren't there patches on the list to add kvm support for riscv?
> 
> 
> r~
> 

Yes I saw something ongoing,

however for the current code, the CONFIG_TCG is not meaningful,
and I think the actual right wrapping of what should and should not be CONFIG_TCG, and the eventual cleanup of that using the build system is going to need more that the CONFIG_TCG that is in there.

Ciao,

Claudio
diff mbox series

Patch

diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a52e0ce466..27dd1645c9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -561,10 +561,9 @@  static void riscv_cpu_class_init(ObjectClass *c, void *data)
     /* For now, mark unmigratable: */
     cc->vmsd = &vmstate_riscv_cpu;
 #endif
-#ifdef CONFIG_TCG
     cc->tcg_ops.initialize = riscv_translate_init;
     cc->tlb_fill = riscv_cpu_tlb_fill;
-#endif
+
     device_class_set_props(dc, riscv_cpu_properties);
 }