From patchwork Mon Dec 14 04:57:47 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 11971271 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3D927C1B0D8 for ; Mon, 14 Dec 2020 05:05:37 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id B115E2085B for ; Mon, 14 Dec 2020 05:05:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org B115E2085B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:58098 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1kog3D-0005i3-Ou for qemu-devel@archiver.kernel.org; Mon, 14 Dec 2020 00:05:35 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39302) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kofwR-0005CY-0C; Sun, 13 Dec 2020 23:58:35 -0500 Received: from bilbo.ozlabs.org ([203.11.71.1]:57739 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1kofwP-0004qm-Aa; Sun, 13 Dec 2020 23:58:34 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 4CvTfr2vgYz9sVk; Mon, 14 Dec 2020 15:58:12 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1607921892; bh=3JVdTeH5BbP9PRGmgWSQ2YWdV3mfkz8TZugSjge2suk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=czK/Gocie9wejiqSAcp8dhGRTzw0YkUX6mH+tg1bNK5CZDoRrzV+k/esfQQd3wv5m S4kSouq3n6WS6eWSaicUFzcoFIWOEUunVoOGRqg2y2zTETvfOHL48TLT7QWOdn3lJ0 VHtQQfM/2vqVPjk8JaJaww1IsAZm4Db4fIQI7RlE= From: David Gibson To: peter.maydell@linaro.org Subject: [PULL 10/30] ppc/translate: Fix unordered f64/f128 comparisons Date: Mon, 14 Dec 2020 15:57:47 +1100 Message-Id: <20201214045807.41003-11-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201214045807.41003-1-david@gibson.dropbear.id.au> References: <20201214045807.41003-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Giuseppe Musacchio , David Gibson , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, groug@kaod.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Giuseppe Musacchio According to the PowerISA v3.1 reference, Table 68 "Actions for xscmpudp - Part 1: Compare Unordered", whenever one of the two operands is a NaN the SO bit is set while the other three bits are cleared. Apply the same change to xscmpuqp. The respective ordered counterparts are unaffected. Signed-off-by: Giuseppe Musacchio Message-Id: <20201112230130.65262-2-thatlemon@gmail.com> Signed-off-by: David Gibson --- target/ppc/fpu_helper.c | 32 ++++++++++++++++++++++---------- 1 file changed, 22 insertions(+), 10 deletions(-) diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c index 32a9a8a0f8..6d3648f5b1 100644 --- a/target/ppc/fpu_helper.c +++ b/target/ppc/fpu_helper.c @@ -2479,13 +2479,11 @@ void helper_##op(CPUPPCState *env, uint32_t opcode, \ if (float64_is_signaling_nan(xa->VsrD(0), &env->fp_status) || \ float64_is_signaling_nan(xb->VsrD(0), &env->fp_status)) { \ vxsnan_flag = true; \ - cc = CRF_SO; \ if (fpscr_ve == 0 && ordered) { \ vxvc_flag = true; \ } \ } else if (float64_is_quiet_nan(xa->VsrD(0), &env->fp_status) || \ float64_is_quiet_nan(xb->VsrD(0), &env->fp_status)) { \ - cc = CRF_SO; \ if (ordered) { \ vxvc_flag = true; \ } \ @@ -2497,12 +2495,19 @@ void helper_##op(CPUPPCState *env, uint32_t opcode, \ float_invalid_op_vxvc(env, 0, GETPC()); \ } \ \ - if (float64_lt(xa->VsrD(0), xb->VsrD(0), &env->fp_status)) { \ + switch (float64_compare(xa->VsrD(0), xb->VsrD(0), &env->fp_status)) {\ + case float_relation_less: \ cc |= CRF_LT; \ - } else if (!float64_le(xa->VsrD(0), xb->VsrD(0), &env->fp_status)) { \ - cc |= CRF_GT; \ - } else { \ + break; \ + case float_relation_equal: \ cc |= CRF_EQ; \ + break; \ + case float_relation_greater: \ + cc |= CRF_GT; \ + break; \ + case float_relation_unordered: \ + cc |= CRF_SO; \ + break; \ } \ \ env->fpscr &= ~FP_FPCC; \ @@ -2545,12 +2550,19 @@ void helper_##op(CPUPPCState *env, uint32_t opcode, \ float_invalid_op_vxvc(env, 0, GETPC()); \ } \ \ - if (float128_lt(xa->f128, xb->f128, &env->fp_status)) { \ + switch (float128_compare(xa->f128, xb->f128, &env->fp_status)) { \ + case float_relation_less: \ cc |= CRF_LT; \ - } else if (!float128_le(xa->f128, xb->f128, &env->fp_status)) { \ - cc |= CRF_GT; \ - } else { \ + break; \ + case float_relation_equal: \ cc |= CRF_EQ; \ + break; \ + case float_relation_greater: \ + cc |= CRF_GT; \ + break; \ + case float_relation_unordered: \ + cc |= CRF_SO; \ + break; \ } \ \ env->fpscr &= ~FP_FPCC; \