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17 Dec 2020 21:46:38 -0800 IronPort-SDR: oX0CGK2HJbMkOApiZQPmsOBAy0K+3zybLTlRW45QngRg1DkNNT54v285U+tIb3ZL8JgqNhBnAx qRDvNiKjHGjsAVr2Bu3Lj01qLZfyDS0LX4QbGVJ30t0R8jvzM2N/CUcfISrimc31XAK+8iU/O/ 2HXMpKraQVAZY/sFrE179GDVcPNtYFULCNC/ybcSw/SqQzfpqV96j8nwAfKCiMGYaSY4NhZ/cg wr2EQeS0sS82vmrNZaXcAG0yUo1BHAKuX4YHY8k4JpflAmuiiV8a6g5dZkm53CJl9o8azqEb9A tx0= WDCIronportException: Internal Received: from 6hj08h2.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.62.68]) by uls-op-cesaip01.wdc.com with ESMTP; 17 Dec 2020 22:01:22 -0800 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 12/23] hw/riscv: virt: Remove compile time XLEN checks Date: Thu, 17 Dec 2020 22:01:03 -0800 Message-Id: <20201218060114.3591217-13-alistair.francis@wdc.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20201218060114.3591217-1-alistair.francis@wdc.com> References: <20201218060114.3591217-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=68.232.143.124; envelope-from=prvs=614e9c0eb=alistair.francis@wdc.com; helo=esa2.hgst.iphmx.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Palmer Dabbelt , alistair23@gmail.com, Bin Meng , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Alistair Francis Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Palmer Dabbelt Acked-by: Palmer Dabbelt Message-id: d7ca1aca672515e6a4aa0d41716238b055f3f25c.1608142916.git.alistair.francis@wdc.com --- hw/riscv/virt.c | 32 +++++++++++++++++--------------- 1 file changed, 17 insertions(+), 15 deletions(-) diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 5377075869..9321d8eda5 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -43,12 +43,6 @@ #include "hw/pci/pci.h" #include "hw/pci-host/gpex.h" -#if defined(TARGET_RISCV32) -# define BIOS_FILENAME "opensbi-riscv32-generic-fw_dynamic.bin" -#else -# define BIOS_FILENAME "opensbi-riscv64-generic-fw_dynamic.bin" -#endif - static const struct MemmapEntry { hwaddr base; hwaddr size; @@ -177,7 +171,7 @@ static void create_pcie_irq_map(void *fdt, char *nodename, } static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, - uint64_t mem_size, const char *cmdline) + uint64_t mem_size, const char *cmdline, bool is_32_bit) { void *fdt; int i, cpu, socket; @@ -240,11 +234,11 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, cpu_name = g_strdup_printf("/cpus/cpu@%d", s->soc[socket].hartid_base + cpu); qemu_fdt_add_subnode(fdt, cpu_name); -#if defined(TARGET_RISCV32) - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32"); -#else - qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48"); -#endif + if (is_32_bit) { + qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv32"); + } else { + qemu_fdt_setprop_string(fdt, cpu_name, "mmu-type", "riscv,sv48"); + } name = riscv_isa_string(&s->soc[socket].harts[cpu]); qemu_fdt_setprop_string(fdt, cpu_name, "riscv,isa", name); g_free(name); @@ -606,7 +600,8 @@ static void virt_machine_init(MachineState *machine) main_mem); /* create device tree */ - create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline); + create_fdt(s, memmap, machine->ram_size, machine->kernel_cmdline, + riscv_is_32_bit(machine)); /* boot rom */ memory_region_init_rom(mask_rom, NULL, "riscv_virt_board.mrom", @@ -614,8 +609,15 @@ static void virt_machine_init(MachineState *machine) memory_region_add_subregion(system_memory, memmap[VIRT_MROM].base, mask_rom); - firmware_end_addr = riscv_find_and_load_firmware(machine, BIOS_FILENAME, - start_addr, NULL); + if (riscv_is_32_bit(machine)) { + firmware_end_addr = riscv_find_and_load_firmware(machine, + "opensbi-riscv32-generic-fw_dynamic.bin", + start_addr, NULL); + } else { + firmware_end_addr = riscv_find_and_load_firmware(machine, + "opensbi-riscv64-generic-fw_dynamic.bin", + start_addr, NULL); + } if (machine->kernel_filename) { kernel_start_addr = riscv_calc_kernel_start_addr(machine,