| Message ID | 20201224031750.52146-4-jiaxun.yang@flygoat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | hw/mips/fuloong2e fixes | expand |
On Thu, 24 Dec 2020, Jiaxun Yang wrote: > Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, Typo: According How come, you say you can boot to Debian installer but don't need any IDE changes when the kernel you submitted as test was shown not working with current IDE emulation? Which installer do you use and what kernel does that have? (The references to the installer and PMON are now missing in your cover letter.) Regards, BALATON Zoltan > despites south bridge IRQs needs special care, all other > IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'. > > As south bridge IRQs are all handled by ISA bus, we can > make a simple direct mapping. > > Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> > --- > v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug) > --- > hw/pci-host/bonito.c | 30 +++++++----------------------- > 1 file changed, 7 insertions(+), 23 deletions(-) > > diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c > index a99eced065..3fad470fc6 100644 > --- a/hw/pci-host/bonito.c > +++ b/hw/pci-host/bonito.c > @@ -62,6 +62,9 @@ > #define DPRINTF(fmt, ...) > #endif > > +/* PCI slots IRQ pins start position */ > +#define BONITO_PCI_IRQ_BASE 25 > + > /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/ > #define BONITO_BOOT_BASE 0x1fc00000 > #define BONITO_BOOT_SIZE 0x00100000 > @@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = { > .endianness = DEVICE_NATIVE_ENDIAN, > }; > > -#define BONITO_IRQ_BASE 32 > - > static void pci_bonito_set_irq(void *opaque, int irq_num, int level) > { > BonitoState *s = opaque; > qemu_irq *pic = s->pic; > PCIBonitoState *bonito_state = s->pci_dev; > - int internal_irq = irq_num - BONITO_IRQ_BASE; > > - if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) { > + if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) { > qemu_irq_pulse(*pic); > } else { /* level triggered */ > - if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) { > + if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) { > qemu_irq_raise(*pic); > } else { > qemu_irq_lower(*pic); > @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level) > } > } > > -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */ > -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) > +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin) > { > - int slot; > - > - slot = (pci_dev->devfn >> 3); > - > - switch (slot) { > - case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */ > - return irq_num % 4 + BONITO_IRQ_BASE; > - case 6: /* FULOONG2E_ATI_SLOT, VGA */ > - return 4 + BONITO_IRQ_BASE; > - case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */ > - return 5 + BONITO_IRQ_BASE; > - case 8 ... 12: /* PCI slot 1 to 4 */ > - return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; > - default: /* Unknown device, don't do any translation */ > - return irq_num; > - } > + return BONITO_PCI_IRQ_BASE + pin; > } > > static void bonito_reset(void *opaque) >
On Thu, 24 Dec 2020, BALATON Zoltan via wrote: > On Thu, 24 Dec 2020, Jiaxun Yang wrote: >> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, > > Typo: According > > How come, you say you can boot to Debian installer but don't need any IDE > changes when the kernel you submitted as test was shown not working with > current IDE emulation? Which installer do you use and what kernel does that > have? (The references to the installer and PMON are now missing in your cover > letter.) Got the reference from v2 cover letter and it's a netboot kernel with an initrd so maybe you did boot into that but did not yet test with CD image or HDD so did not get to the IDE problem yet. Regards, BALATON Zoltan >> despites south bridge IRQs needs special care, all other >> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'. >> >> As south bridge IRQs are all handled by ISA bus, we can >> make a simple direct mapping. >> >> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >> --- >> v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug) >> --- >> hw/pci-host/bonito.c | 30 +++++++----------------------- >> 1 file changed, 7 insertions(+), 23 deletions(-) >> >> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c >> index a99eced065..3fad470fc6 100644 >> --- a/hw/pci-host/bonito.c >> +++ b/hw/pci-host/bonito.c >> @@ -62,6 +62,9 @@ >> #define DPRINTF(fmt, ...) >> #endif >> >> +/* PCI slots IRQ pins start position */ >> +#define BONITO_PCI_IRQ_BASE 25 >> + >> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/ >> #define BONITO_BOOT_BASE 0x1fc00000 >> #define BONITO_BOOT_SIZE 0x00100000 >> @@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = { >> .endianness = DEVICE_NATIVE_ENDIAN, >> }; >> >> -#define BONITO_IRQ_BASE 32 >> - >> static void pci_bonito_set_irq(void *opaque, int irq_num, int level) >> { >> BonitoState *s = opaque; >> qemu_irq *pic = s->pic; >> PCIBonitoState *bonito_state = s->pci_dev; >> - int internal_irq = irq_num - BONITO_IRQ_BASE; >> >> - if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) { >> + if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) { >> qemu_irq_pulse(*pic); >> } else { /* level triggered */ >> - if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) { >> + if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) { >> qemu_irq_raise(*pic); >> } else { >> qemu_irq_lower(*pic); >> @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int >> irq_num, int level) >> } >> } >> >> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) >> */ >> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) >> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin) >> { >> - int slot; >> - >> - slot = (pci_dev->devfn >> 3); >> - >> - switch (slot) { >> - case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, >> MC97 */ >> - return irq_num % 4 + BONITO_IRQ_BASE; >> - case 6: /* FULOONG2E_ATI_SLOT, VGA */ >> - return 4 + BONITO_IRQ_BASE; >> - case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */ >> - return 5 + BONITO_IRQ_BASE; >> - case 8 ... 12: /* PCI slot 1 to 4 */ >> - return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; >> - default: /* Unknown device, don't do any translation */ >> - return irq_num; >> - } >> + return BONITO_PCI_IRQ_BASE + pin; >> } >> >> static void bonito_reset(void *opaque) >> > >
在 2020/12/24 16:40, BALATON Zoltan 写道: > On Thu, 24 Dec 2020, BALATON Zoltan via wrote: >> On Thu, 24 Dec 2020, Jiaxun Yang wrote: >>> Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, >> >> Typo: According >> >> How come, you say you can boot to Debian installer but don't need any >> IDE changes when the kernel you submitted as test was shown not >> working with current IDE emulation? Which installer do you use and >> what kernel does that have? (The references to the installer and PMON >> are now missing in your cover letter.) > > Got the reference from v2 cover letter and it's a netboot kernel with > an initrd so maybe you did boot into that but did not yet test with CD > image or HDD so did not get to the IDE problem yet. Yes, I found this IRQ issue when I was trying to connect to ethernet. Sorry for other stupid mistakes in ther series :-( Needs coffee at the moment. Thanks. - Jiaxun > > Regards, > BALATON Zoltan > >>> despites south bridge IRQs needs special care, all other >>> IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'. >>> >>> As south bridge IRQs are all handled by ISA bus, we can >>> make a simple direct mapping. >>> >>> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> >>> --- >>> v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug) >>> --- >>> hw/pci-host/bonito.c | 30 +++++++----------------------- >>> 1 file changed, 7 insertions(+), 23 deletions(-) >>> >>> diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c >>> index a99eced065..3fad470fc6 100644 >>> --- a/hw/pci-host/bonito.c >>> +++ b/hw/pci-host/bonito.c >>> @@ -62,6 +62,9 @@ >>> #define DPRINTF(fmt, ...) >>> #endif >>> >>> +/* PCI slots IRQ pins start position */ >>> +#define BONITO_PCI_IRQ_BASE 25 >>> + >>> /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/ >>> #define BONITO_BOOT_BASE 0x1fc00000 >>> #define BONITO_BOOT_SIZE 0x00100000 >>> @@ -546,19 +549,16 @@ static const MemoryRegionOps >>> bonito_spciconf_ops = { >>> .endianness = DEVICE_NATIVE_ENDIAN, >>> }; >>> >>> -#define BONITO_IRQ_BASE 32 >>> - >>> static void pci_bonito_set_irq(void *opaque, int irq_num, int level) >>> { >>> BonitoState *s = opaque; >>> qemu_irq *pic = s->pic; >>> PCIBonitoState *bonito_state = s->pci_dev; >>> - int internal_irq = irq_num - BONITO_IRQ_BASE; >>> >>> - if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) { >>> + if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) { >>> qemu_irq_pulse(*pic); >>> } else { /* level triggered */ >>> - if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) { >>> + if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) { >>> qemu_irq_raise(*pic); >>> } else { >>> qemu_irq_lower(*pic); >>> @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, >>> int irq_num, int level) >>> } >>> } >>> >>> -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are >>> unused) */ >>> -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) >>> +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin) >>> { >>> - int slot; >>> - >>> - slot = (pci_dev->devfn >> 3); >>> - >>> - switch (slot) { >>> - case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, >>> AC97, MC97 */ >>> - return irq_num % 4 + BONITO_IRQ_BASE; >>> - case 6: /* FULOONG2E_ATI_SLOT, VGA */ >>> - return 4 + BONITO_IRQ_BASE; >>> - case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */ >>> - return 5 + BONITO_IRQ_BASE; >>> - case 8 ... 12: /* PCI slot 1 to 4 */ >>> - return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; >>> - default: /* Unknown device, don't do any translation */ >>> - return irq_num; >>> - } >>> + return BONITO_PCI_IRQ_BASE + pin; >>> } >>> >>> static void bonito_reset(void *opaque) >>> >> >>
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index a99eced065..3fad470fc6 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -62,6 +62,9 @@ #define DPRINTF(fmt, ...) #endif +/* PCI slots IRQ pins start position */ +#define BONITO_PCI_IRQ_BASE 25 + /* from linux soure code. include/asm-mips/mips-boards/bonito64.h*/ #define BONITO_BOOT_BASE 0x1fc00000 #define BONITO_BOOT_SIZE 0x00100000 @@ -546,19 +549,16 @@ static const MemoryRegionOps bonito_spciconf_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -#define BONITO_IRQ_BASE 32 - static void pci_bonito_set_irq(void *opaque, int irq_num, int level) { BonitoState *s = opaque; qemu_irq *pic = s->pic; PCIBonitoState *bonito_state = s->pci_dev; - int internal_irq = irq_num - BONITO_IRQ_BASE; - if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) { + if (bonito_state->regs[BONITO_INTEDGE] & (1 << irq_num)) { qemu_irq_pulse(*pic); } else { /* level triggered */ - if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) { + if (bonito_state->regs[BONITO_INTPOL] & (1 << irq_num)) { qemu_irq_raise(*pic); } else { qemu_irq_lower(*pic); @@ -566,25 +566,9 @@ static void pci_bonito_set_irq(void *opaque, int irq_num, int level) } } -/* map the original irq (0~3) to bonito irq (16~47, but 16~31 are unused) */ -static int pci_bonito_map_irq(PCIDevice *pci_dev, int irq_num) +static int pci_bonito_map_irq(PCIDevice *pci_dev, int pin) { - int slot; - - slot = (pci_dev->devfn >> 3); - - switch (slot) { - case 5: /* FULOONG2E_VIA_SLOT, SouthBridge, IDE, USB, ACPI, AC97, MC97 */ - return irq_num % 4 + BONITO_IRQ_BASE; - case 6: /* FULOONG2E_ATI_SLOT, VGA */ - return 4 + BONITO_IRQ_BASE; - case 7: /* FULOONG2E_RTL_SLOT, RTL8139 */ - return 5 + BONITO_IRQ_BASE; - case 8 ... 12: /* PCI slot 1 to 4 */ - return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; - default: /* Unknown device, don't do any translation */ - return irq_num; - } + return BONITO_PCI_IRQ_BASE + pin; } static void bonito_reset(void *opaque)
Accroading to arch/mips/pci/fixup-fuloong2e.c in kernel, despites south bridge IRQs needs special care, all other IRQ pins are mapped by 'LOONGSON_IRQ_BASE + 25 + pin'. As south bridge IRQs are all handled by ISA bus, we can make a simple direct mapping. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> --- v3: Define BONITO_PCI_IRQ_BASE for readability (f4bug) --- hw/pci-host/bonito.c | 30 +++++++----------------------- 1 file changed, 7 insertions(+), 23 deletions(-)