@@ -321,6 +321,20 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
trace_imx_spi_write(index, imx_spi_reg_name(index), value);
+ if (!imx_spi_is_enabled(s)) {
+ /* Block is disabled */
+ if (index != ECSPI_CONREG) {
+ /* Ignore access */
+ return;
+ }
+ s->regs[ECSPI_CONREG] = value;
+ if (value & ECSPI_CONREG_EN) {
+ /* Keep disabled */
+ return;
+ }
+ /* Enable the block */
+ imx_spi_reset(DEVICE(s));
+ }
switch (index) {
case ECSPI_RXDATA:
@@ -328,10 +342,7 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
TYPE_IMX_SPI, __func__);
break;
case ECSPI_TXDATA:
- if (!imx_spi_is_enabled(s)) {
- /* Ignore writes if device is disabled */
- break;
- } else if (fifo32_is_full(&s->tx_fifo)) {
+ if (fifo32_is_full(&s->tx_fifo)) {
/* Ignore writes if queue is full */
break;
}
@@ -357,12 +368,6 @@ static void imx_spi_write(void *opaque, hwaddr offset, uint64_t value,
case ECSPI_CONREG:
s->regs[ECSPI_CONREG] = value;
- if (!imx_spi_is_enabled(s)) {
- /* device is disabled, so this is a reset */
- imx_spi_reset(DEVICE(s));
- return;
- }
-
if (imx_spi_channel_is_master(s)) {
uint32_t change_mask = s->regs[index] ^ value;
int i;
When the block is disabled, only the ECSPI_CONREG register can be modified. Setting the EN bit enabled the device, clearing it "disables the block and resets the internal logic with the exception of the ECSPI_CONREG" register. Move the imx_spi_is_enabled() check earlier. Ref: i.MX 6DQ Applications Processor Reference Manual (IMX6DQRM), chapter 21.7.3: Control Register (ECSPIx_CONREG) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- hw/ssi/imx_spi.c | 25 +++++++++++++++---------- 1 file changed, 15 insertions(+), 10 deletions(-)