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[83.57.169.13]) by smtp.gmail.com with ESMTPSA id a6sm3760308wmj.27.2021.01.27.15.22.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Jan 2021 15:22:08 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 3/5] target/sh4: Pass mmu_idx to get_physical_address() Date: Thu, 28 Jan 2021 00:21:49 +0100 Message-Id: <20210127232151.3523581-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210127232151.3523581-1-f4bug@amsat.org> References: <20210127232151.3523581-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x32c.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , Joe Komlodi , Yoshinori Sato , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" get_mmu_address() and get_physical_address() don't use their 'int access_type' argument: remove it along with ACCESS_INT in superh_cpu_tlb_fill(). Pass the MMU index along, as other targets do. Signed-off-by: Philippe Mathieu-Daudé --- target/sh4/helper.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 4303ebf018b..737938d2fd1 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -331,7 +331,7 @@ static int find_utlb_entry(CPUSH4State * env, target_ulong address, int use_asid */ static int get_mmu_address(CPUSH4State * env, target_ulong * physical, int *prot, target_ulong address, - int rw, int access_type) + int rw, int mmu_idx) { int use_asid, n; tlb_t *matching = NULL; @@ -398,7 +398,7 @@ static int get_mmu_address(CPUSH4State * env, target_ulong * physical, static int get_physical_address(CPUSH4State * env, target_ulong * physical, int *prot, target_ulong address, - int rw, int access_type) + int rw, int mmu_idx) { /* P1, P2 and P4 areas do not use translation */ if ((address >= 0x80000000 && address < 0xc0000000) || address >= 0xe0000000) { @@ -432,7 +432,7 @@ static int get_physical_address(CPUSH4State * env, target_ulong * physical, } /* We need to resort to the MMU */ - return get_mmu_address(env, physical, prot, address, rw, access_type); + return get_mmu_address(env, physical, prot, address, rw, mmu_idx); } hwaddr superh_cpu_get_phys_page_debug(CPUState *cs, vaddr addr) @@ -813,11 +813,10 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMU_DTLB_VIOLATION_READ); #else target_ulong physical; - int prot, sh_access_type; + int prot; - sh_access_type = ACCESS_INT; ret = get_physical_address(env, &physical, &prot, address, - access_type, sh_access_type); + access_type, mmu_idx); if (ret == MMU_OK) { address &= TARGET_PAGE_MASK;