diff mbox series

[15/38] target/riscv: 16-bit Packing Instructions

Message ID 20210212150256.885-16-zhiwei_liu@c-sky.com (mailing list archive)
State New, archived
Headers show
Series target/riscv: support packed extension v0.9.2 | expand

Commit Message

LIU Zhiwei Feb. 12, 2021, 3:02 p.m. UTC
Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
 target/riscv/helper.h                   |  5 +++
 target/riscv/insn32.decode              |  5 +++
 target/riscv/insn_trans/trans_rvp.c.inc |  9 +++++
 target/riscv/packed_helper.c            | 45 +++++++++++++++++++++++++
 4 files changed, 64 insertions(+)

Comments

Alistair Francis March 16, 2021, 2:42 p.m. UTC | #1
On Fri, Feb 12, 2021 at 10:34 AM LIU Zhiwei <zhiwei_liu@c-sky.com> wrote:
>
> Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>

Acked-by: Alistair Francis <alistair.francis@wdc.com>

Alistair

> ---
>  target/riscv/helper.h                   |  5 +++
>  target/riscv/insn32.decode              |  5 +++
>  target/riscv/insn_trans/trans_rvp.c.inc |  9 +++++
>  target/riscv/packed_helper.c            | 45 +++++++++++++++++++++++++
>  4 files changed, 64 insertions(+)
>
> diff --git a/target/riscv/helper.h b/target/riscv/helper.h
> index 585905a689..4dc66cf4cc 100644
> --- a/target/riscv/helper.h
> +++ b/target/riscv/helper.h
> @@ -1263,3 +1263,8 @@ DEF_HELPER_2(zunpkd820, tl, env, tl)
>  DEF_HELPER_2(zunpkd830, tl, env, tl)
>  DEF_HELPER_2(zunpkd831, tl, env, tl)
>  DEF_HELPER_2(zunpkd832, tl, env, tl)
> +
> +DEF_HELPER_3(pkbb16, tl, env, tl, tl)
> +DEF_HELPER_3(pkbt16, tl, env, tl, tl)
> +DEF_HELPER_3(pktt16, tl, env, tl, tl)
> +DEF_HELPER_3(pktb16, tl, env, tl, tl)
> diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
> index fa4a02c9db..a4d9ff2282 100644
> --- a/target/riscv/insn32.decode
> +++ b/target/riscv/insn32.decode
> @@ -731,3 +731,8 @@ zunpkd820  1010110  01101 ..... 000 ..... 1111111 @r2
>  zunpkd830  1010110  01110 ..... 000 ..... 1111111 @r2
>  zunpkd831  1010110  01111 ..... 000 ..... 1111111 @r2
>  zunpkd832  1010110  10111 ..... 000 ..... 1111111 @r2
> +
> +pkbb16     0000111  ..... ..... 001 ..... 1111111 @r
> +pkbt16     0001111  ..... ..... 001 ..... 1111111 @r
> +pktt16     0010111  ..... ..... 001 ..... 1111111 @r
> +pktb16     0011111  ..... ..... 001 ..... 1111111 @r
> diff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_trans/trans_rvp.c.inc
> index b69e964cb4..99a19019eb 100644
> --- a/target/riscv/insn_trans/trans_rvp.c.inc
> +++ b/target/riscv/insn_trans/trans_rvp.c.inc
> @@ -511,3 +511,12 @@ GEN_RVP_R2_OOL(zunpkd820);
>  GEN_RVP_R2_OOL(zunpkd830);
>  GEN_RVP_R2_OOL(zunpkd831);
>  GEN_RVP_R2_OOL(zunpkd832);
> +
> +/*
> + *** Partial-SIMD Data Processing Instruction
> + */
> +/* 16-bit Packing Instructions */
> +GEN_RVP_R_OOL(pkbb16);
> +GEN_RVP_R_OOL(pkbt16);
> +GEN_RVP_R_OOL(pktt16);
> +GEN_RVP_R_OOL(pktb16);
> diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c
> index d0dcb692f5..fe1b48c86d 100644
> --- a/target/riscv/packed_helper.c
> +++ b/target/riscv/packed_helper.c
> @@ -1323,3 +1323,48 @@ do_zunpkd832(CPURISCVState *env, void *vd, void *va, uint8_t i)
>  }
>
>  RVPR2(zunpkd832, 4, 1);
> +
> +/*
> + *** Partial-SIMD Data Processing Instructions
> + */
> +
> +/* 16-bit Packing Instructions */
> +static inline void do_pkbb16(CPURISCVState *env, void *vd, void *va,
> +                             void *vb, uint8_t i)
> +{
> +    uint16_t *d = vd, *a = va, *b = vb;
> +    d[H2(i + 1)] = a[H2(i)];
> +    d[H2(i)] = b[H2(i)];
> +}
> +
> +RVPR(pkbb16, 2, 2);
> +
> +static inline void do_pkbt16(CPURISCVState *env, void *vd, void *va,
> +                             void *vb, uint8_t i)
> +{
> +    uint16_t *d = vd, *a = va, *b = vb;
> +    d[H2(i + 1)] = a[H2(i)];
> +    d[H2(i)] = b[H2(i + 1)];
> +}
> +
> +RVPR(pkbt16, 2, 2);
> +
> +static inline void do_pktt16(CPURISCVState *env, void *vd, void *va,
> +                             void *vb, uint8_t i)
> +{
> +    uint16_t *d = vd, *a = va, *b = vb;
> +    d[H2(i + 1)] = a[H2(i + 1)];
> +    d[H2(i)] = b[H2(i + 1)];
> +}
> +
> +RVPR(pktt16, 2, 2);
> +
> +static inline void do_pktb16(CPURISCVState *env, void *vd, void *va,
> +                             void *vb, uint8_t i)
> +{
> +    uint16_t *d = vd, *a = va, *b = vb;
> +    d[H2(i + 1)] = a[H2(i + 1)];
> +    d[H2(i)] = b[H2(i)];
> +}
> +
> +RVPR(pktb16, 2, 2);
> --
> 2.17.1
>
diff mbox series

Patch

diff --git a/target/riscv/helper.h b/target/riscv/helper.h
index 585905a689..4dc66cf4cc 100644
--- a/target/riscv/helper.h
+++ b/target/riscv/helper.h
@@ -1263,3 +1263,8 @@  DEF_HELPER_2(zunpkd820, tl, env, tl)
 DEF_HELPER_2(zunpkd830, tl, env, tl)
 DEF_HELPER_2(zunpkd831, tl, env, tl)
 DEF_HELPER_2(zunpkd832, tl, env, tl)
+
+DEF_HELPER_3(pkbb16, tl, env, tl, tl)
+DEF_HELPER_3(pkbt16, tl, env, tl, tl)
+DEF_HELPER_3(pktt16, tl, env, tl, tl)
+DEF_HELPER_3(pktb16, tl, env, tl, tl)
diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode
index fa4a02c9db..a4d9ff2282 100644
--- a/target/riscv/insn32.decode
+++ b/target/riscv/insn32.decode
@@ -731,3 +731,8 @@  zunpkd820  1010110  01101 ..... 000 ..... 1111111 @r2
 zunpkd830  1010110  01110 ..... 000 ..... 1111111 @r2
 zunpkd831  1010110  01111 ..... 000 ..... 1111111 @r2
 zunpkd832  1010110  10111 ..... 000 ..... 1111111 @r2
+
+pkbb16     0000111  ..... ..... 001 ..... 1111111 @r
+pkbt16     0001111  ..... ..... 001 ..... 1111111 @r
+pktt16     0010111  ..... ..... 001 ..... 1111111 @r
+pktb16     0011111  ..... ..... 001 ..... 1111111 @r
diff --git a/target/riscv/insn_trans/trans_rvp.c.inc b/target/riscv/insn_trans/trans_rvp.c.inc
index b69e964cb4..99a19019eb 100644
--- a/target/riscv/insn_trans/trans_rvp.c.inc
+++ b/target/riscv/insn_trans/trans_rvp.c.inc
@@ -511,3 +511,12 @@  GEN_RVP_R2_OOL(zunpkd820);
 GEN_RVP_R2_OOL(zunpkd830);
 GEN_RVP_R2_OOL(zunpkd831);
 GEN_RVP_R2_OOL(zunpkd832);
+
+/*
+ *** Partial-SIMD Data Processing Instruction
+ */
+/* 16-bit Packing Instructions */
+GEN_RVP_R_OOL(pkbb16);
+GEN_RVP_R_OOL(pkbt16);
+GEN_RVP_R_OOL(pktt16);
+GEN_RVP_R_OOL(pktb16);
diff --git a/target/riscv/packed_helper.c b/target/riscv/packed_helper.c
index d0dcb692f5..fe1b48c86d 100644
--- a/target/riscv/packed_helper.c
+++ b/target/riscv/packed_helper.c
@@ -1323,3 +1323,48 @@  do_zunpkd832(CPURISCVState *env, void *vd, void *va, uint8_t i)
 }
 
 RVPR2(zunpkd832, 4, 1);
+
+/*
+ *** Partial-SIMD Data Processing Instructions
+ */
+
+/* 16-bit Packing Instructions */
+static inline void do_pkbb16(CPURISCVState *env, void *vd, void *va,
+                             void *vb, uint8_t i)
+{
+    uint16_t *d = vd, *a = va, *b = vb;
+    d[H2(i + 1)] = a[H2(i)];
+    d[H2(i)] = b[H2(i)];
+}
+
+RVPR(pkbb16, 2, 2);
+
+static inline void do_pkbt16(CPURISCVState *env, void *vd, void *va,
+                             void *vb, uint8_t i)
+{
+    uint16_t *d = vd, *a = va, *b = vb;
+    d[H2(i + 1)] = a[H2(i)];
+    d[H2(i)] = b[H2(i + 1)];
+}
+
+RVPR(pkbt16, 2, 2);
+
+static inline void do_pktt16(CPURISCVState *env, void *vd, void *va,
+                             void *vb, uint8_t i)
+{
+    uint16_t *d = vd, *a = va, *b = vb;
+    d[H2(i + 1)] = a[H2(i + 1)];
+    d[H2(i)] = b[H2(i + 1)];
+}
+
+RVPR(pktt16, 2, 2);
+
+static inline void do_pktb16(CPURISCVState *env, void *vd, void *va,
+                             void *vb, uint8_t i)
+{
+    uint16_t *d = vd, *a = va, *b = vb;
+    d[H2(i + 1)] = a[H2(i + 1)];
+    d[H2(i)] = b[H2(i)];
+}
+
+RVPR(pktb16, 2, 2);