diff mbox series

[PULL,3/7] m68k: improve comments on m68k_move_to/from helpers

Message ID 20210212211448.413489-4-laurent@vivier.eu (mailing list archive)
State New, archived
Headers show
Series [PULL,1/7] m68k: improve cpu instantiation comments | expand

Commit Message

Laurent Vivier Feb. 12, 2021, 9:14 p.m. UTC 
From: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>

Add more detailed comments to each case of m68k_move_to/from helpers to list
the supported CPUs for that CR as they were wrong in some cases, and
missing some cpu classes in other cases.

Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com>
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu>
Message-Id: <a8bd70b66e3dbdb7d2ab7a852af71cdbf341d50c.1612137712.git.balaton@eik.bme.hu>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
---
 target/m68k/helper.c | 39 ++++++++++++++++++++++++++++++---------
 1 file changed, 30 insertions(+), 9 deletions(-)
diff mbox series

Patch

diff --git a/target/m68k/helper.c b/target/m68k/helper.c
index 3ff57657958c..9e81ee53ad8b 100644
--- a/target/m68k/helper.c
+++ b/target/m68k/helper.c
@@ -187,13 +187,15 @@  void HELPER(cf_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
 void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
 {
     switch (reg) {
-    /* MC680[1234]0 */
+    /* MC680[12346]0 */
     case M68K_CR_SFC:
         env->sfc = val & 7;
         return;
+    /* MC680[12346]0 */
     case M68K_CR_DFC:
         env->dfc = val & 7;
         return;
+    /* MC680[12346]0 */
     case M68K_CR_VBR:
         env->vbr = val;
         return;
@@ -210,25 +212,30 @@  void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
         }
         m68k_switch_sp(env);
         return;
-    /* MC680[34]0 */
+    /* MC680[46]0 */
     case M68K_CR_TC:
         env->mmu.tcr = val;
         return;
+    /* MC68040 */
     case M68K_CR_MMUSR:
         env->mmu.mmusr = val;
         return;
+    /* MC680[46]0 */
     case M68K_CR_SRP:
         env->mmu.srp = val;
         return;
     case M68K_CR_URP:
         env->mmu.urp = val;
         return;
+    /* MC680[46]0 */
     case M68K_CR_USP:
         env->sp[M68K_USP] = val;
         return;
+    /* MC680[234]0 */
     case M68K_CR_MSP:
         env->sp[M68K_SSP] = val;
         return;
+    /* MC680[234]0 */
     case M68K_CR_ISP:
         env->sp[M68K_ISP] = val;
         return;
@@ -236,12 +243,15 @@  void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
     case M68K_CR_ITT0:
         env->mmu.ttr[M68K_ITTR0] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_ITT1:
          env->mmu.ttr[M68K_ITTR1] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_DTT0:
         env->mmu.ttr[M68K_DTTR0] = val;
         return;
+    /* MC68040/MC68LC040 */
     case M68K_CR_DTT1:
         env->mmu.ttr[M68K_DTTR1] = val;
         return;
@@ -254,39 +264,50 @@  void HELPER(m68k_movec_to)(CPUM68KState *env, uint32_t reg, uint32_t val)
 uint32_t HELPER(m68k_movec_from)(CPUM68KState *env, uint32_t reg)
 {
     switch (reg) {
-    /* MC680[1234]0 */
+    /* MC680[12346]0 */
     case M68K_CR_SFC:
         return env->sfc;
+    /* MC680[12346]0 */
     case M68K_CR_DFC:
         return env->dfc;
+    /* MC680[12346]0 */
     case M68K_CR_VBR:
         return env->vbr;
-    /* MC680[234]0 */
+    /* MC680[2346]0 */
     case M68K_CR_CACR:
         return env->cacr;
-    /* MC680[34]0 */
+    /* MC680[46]0 */
     case M68K_CR_TC:
         return env->mmu.tcr;
+    /* MC68040 */
     case M68K_CR_MMUSR:
         return env->mmu.mmusr;
+    /* MC680[46]0 */
     case M68K_CR_SRP:
         return env->mmu.srp;
+    /* MC680[46]0 */
     case M68K_CR_USP:
         return env->sp[M68K_USP];
+    /* MC680[234]0 */
     case M68K_CR_MSP:
         return env->sp[M68K_SSP];
+    /* MC680[234]0 */
     case M68K_CR_ISP:
         return env->sp[M68K_ISP];
     /* MC68040/MC68LC040 */
     case M68K_CR_URP:
         return env->mmu.urp;
-    case M68K_CR_ITT0:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_ITT0: /* MC68EC040 only: M68K_CR_IACR0 */
         return env->mmu.ttr[M68K_ITTR0];
-    case M68K_CR_ITT1:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_ITT1: /* MC68EC040 only: M68K_CR_IACR1 */
         return env->mmu.ttr[M68K_ITTR1];
-    case M68K_CR_DTT0:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_DTT0: /* MC68EC040 only: M68K_CR_DACR0 */
         return env->mmu.ttr[M68K_DTTR0];
-    case M68K_CR_DTT1:
+    /* MC68040/MC68LC040 */
+    case M68K_CR_DTT1: /* MC68EC040 only: M68K_CR_DACR1 */
         return env->mmu.ttr[M68K_DTTR1];
     }
     cpu_abort(env_cpu(env), "Unimplemented control register read 0x%x\n",