diff mbox series

[v5,3/4] qapi: Move X86 specific types to machine-target.json

Message ID 20210224224643.3369940-4-philmd@redhat.com (mailing list archive)
State New, archived
Headers show
Series qapi: Restrict X86 features to X86 targets | expand

Commit Message

Philippe Mathieu-Daudé Feb. 24, 2021, 10:46 p.m. UTC
X86CPURegister32 enum and X86CPUFeatureWordInfo structure
are specific to the x86 architecture, move these entries
to machine-target.json.

Restricting the x86-specific commands to machine-target.json
pulls less QAPI-generated code into non-x86 targets.

Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
 qapi/machine-target.json  | 42 +++++++++++++++++++++++++++++++++++++++
 qapi/machine.json         | 42 ---------------------------------------
 target/i386/cpu-softmmu.c |  2 +-
 3 files changed, 43 insertions(+), 43 deletions(-)
diff mbox series

Patch

diff --git a/qapi/machine-target.json b/qapi/machine-target.json
index e7811654b72..106fbd2e9ed 100644
--- a/qapi/machine-target.json
+++ b/qapi/machine-target.json
@@ -329,3 +329,45 @@ 
 ##
 { 'command': 'query-cpu-definitions', 'returns': ['CpuDefinitionInfo'],
   'if': 'defined(TARGET_PPC) || defined(TARGET_ARM) || defined(TARGET_I386) || defined(TARGET_S390X) || defined(TARGET_MIPS)' }
+
+##
+# @X86CPURegister32:
+#
+# A X86 32-bit register
+#
+# Since: 1.5
+##
+{ 'enum': 'X86CPURegister32',
+  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
+
+##
+# @X86CPUFeatureWordInfo:
+#
+# Information about a X86 CPU feature word
+#
+# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
+#
+# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
+#                   feature word
+#
+# @cpuid-register: Output register containing the feature bits
+#
+# @features: value of output register, containing the feature bits
+#
+# Since: 1.5
+##
+{ 'struct': 'X86CPUFeatureWordInfo',
+  'data': { 'cpuid-input-eax': 'int',
+            '*cpuid-input-ecx': 'int',
+            'cpuid-register': 'X86CPURegister32',
+            'features': 'int' } }
+
+##
+# @DummyForceArrays:
+#
+# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
+#
+# Since: 2.5
+##
+{ 'struct': 'DummyForceArrays',
+  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
diff --git a/qapi/machine.json b/qapi/machine.json
index 330189efe3d..8053803a0e0 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -681,48 +681,6 @@ 
    'dst': 'uint16',
    'val': 'uint8' }}
 
-##
-# @X86CPURegister32:
-#
-# A X86 32-bit register
-#
-# Since: 1.5
-##
-{ 'enum': 'X86CPURegister32',
-  'data': [ 'EAX', 'EBX', 'ECX', 'EDX', 'ESP', 'EBP', 'ESI', 'EDI' ] }
-
-##
-# @X86CPUFeatureWordInfo:
-#
-# Information about a X86 CPU feature word
-#
-# @cpuid-input-eax: Input EAX value for CPUID instruction for that feature word
-#
-# @cpuid-input-ecx: Input ECX value for CPUID instruction for that
-#                   feature word
-#
-# @cpuid-register: Output register containing the feature bits
-#
-# @features: value of output register, containing the feature bits
-#
-# Since: 1.5
-##
-{ 'struct': 'X86CPUFeatureWordInfo',
-  'data': { 'cpuid-input-eax': 'int',
-            '*cpuid-input-ecx': 'int',
-            'cpuid-register': 'X86CPURegister32',
-            'features': 'int' } }
-
-##
-# @DummyForceArrays:
-#
-# Not used by QMP; hack to let us use X86CPUFeatureWordInfoList internally
-#
-# Since: 2.5
-##
-{ 'struct': 'DummyForceArrays',
-  'data': { 'unused': ['X86CPUFeatureWordInfo'] } }
-
 ##
 # @NumaCpuOptions:
 #
diff --git a/target/i386/cpu-softmmu.c b/target/i386/cpu-softmmu.c
index 34fd7b0de02..a7afa7963db 100644
--- a/target/i386/cpu-softmmu.c
+++ b/target/i386/cpu-softmmu.c
@@ -23,7 +23,7 @@ 
 #include "sysemu/whpx.h"
 #include "kvm/kvm_i386.h"
 #include "qapi/error.h"
-#include "qapi/qapi-visit-machine.h"
+#include "qapi/qapi-visit-machine-target.h"
 #include "qapi/qapi-visit-run-state.h"
 #include "qapi/qmp/qdict.h"
 #include "qom/qom-qobject.h"