[01/50] target/i386: Split out gen_exception_gpf

Message ID	20210228232321.322053-2-richard.henderson@linaro.org (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=B4BO=H6=nongnu.org=qemu-devel-bounces+qemu-devel=archiver.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6733564D9F From: Richard Henderson <richard.henderson@linaro.org> To: qemu-devel@nongnu.org Subject: [PATCH 01/50] target/i386: Split out gen_exception_gpf Date: Sun, 28 Feb 2021 15:22:32 -0800 Message-Id: <20210228232321.322053-2-richard.henderson@linaro.org> In-Reply-To: <20210228232321.322053-1-richard.henderson@linaro.org> References: <20210228232321.322053-1-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::62a; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Cc: cfontana@suse.de Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org>
Series	i386 cleanup part 3 \| expand [00/50] i386 cleanup part 3 [01/50] target/i386: Split out gen_exception_gpf [02/50] target/i386: Split out check_cpl0 [03/50] target/i386: Unify code paths for IRET [04/50] target/i386: Split out check_vm86_iopl [05/50] target/i386: Split out check_iopl [06/50] target/i386: Assert PE is set for user-only [07/50] target/i386: Assert CPL is 3 for user-only [08/50] target/i386: Assert IOPL is 0 for user-only [09/50] target/i386: Assert !VM86 for x86_64 user-only [10/50] target/i386: Assert CODE32 for x86_64 user-only [11/50] target/i386: Assert SS32 for x86_64 user-only [12/50] target/i386: Assert CODE64 for x86_64 user-only [13/50] target/i386: Assert LMA for x86_64 user-only [14/50] target/i386: Assert !ADDSEG for x86_64 user-only [15/50] target/i386: Introduce REX_PREFIX [16/50] target/i386: Tidy REX_B, REX_X definition [17/50] target/i386: Move rex_r into DisasContext [18/50] target/i386: Move rex_w into DisasContext [19/50] target/i386: Remove DisasContext.f_st as unused [20/50] target/i386: Reduce DisasContext.flags to uint32_t [21/50] target/i386: Reduce DisasContext.override to int8_t [22/50] target/i386: Reduce DisasContext.prefix to uint8_t [23/50] target/i386: Reduce DisasContext.vex_[lv] to uint8_t [24/50] target/i386: Reduce DisasContext popl_esp_hack and rip_offset to uint8_t [25/50] target/i386: Leave TF in DisasContext.flags [26/50] target/i386: Reduce DisasContext jmp_opt, repz_opt to bool [27/50] target/i386: Fix the comment for repz_opt [28/50] target/i386: Reorder DisasContext members [29/50] target/i386: Add stub generator for helper_set_dr [30/50] target/i386: Assert !SVME for user-only [31/50] target/i386: Assert !GUEST for user-only [32/50] target/i386: Implement skinit in translate.c [33/50] target/i386: Eliminate SVM helpers for user-only [34/50] target/i386: Mark some helpers as noreturn [35/50] target/i386: Simplify gen_debug usage [36/50] target/i386: Tidy svm_check_intercept from tcg [37/50] target/i386: Remove pc_start argument to gen_svm_check_intercept [38/50] target/i386: Remove user stub for cpu_vmexit [39/50] target/i386: Cleanup read_crN, write_crN, lmsw [40/50] target/i386: Pass env to do_pause and do_hlt [41/50] target/i386: Move invlpg, hlt, monitor, mwait to sysemu [42/50] target/i386: Unify invlpg, invlpga [43/50] target/i386: Inline user cpu_svm_check_intercept_param [44/50] target/i386: Eliminate user stubs for read/write_crN, rd/wrmsr [45/50] target/i386: Exit tb after wrmsr [46/50] target/i386: Tidy gen_check_io [47/50] target/i386: Pass in port to gen_check_io [48/50] target/i386: Create helper_check_io [49/50] target/i386: Move helper_check_io to sysemu [50/50] target/i386: Remove user-only i/o stubs

diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index 6ecbbfa6c1..6af8bd219b 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -1276,6 +1276,12 @@ static void gen_illegal_opcode(DisasContext *s) gen_exception(s, EXCP06_ILLOP, s->pc_start - s->cs_base); } +/* Generate #GP for the current instruction. */ +static void gen_exception_gpf(DisasContext *s) +{ + gen_exception(s, EXCP0D_GPF, s->pc_start - s->cs_base); +} + /* if d == OR_TMP0, it means memory operand (address in A0) */ static void gen_op(DisasContext *s1, int op, MemOp ot, int d) { @@ -4502,7 +4508,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) s->vex_l = 0; s->vex_v = 0; if (sigsetjmp(s->jmpbuf, 0) != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); return s->pc; } @@ -6561,7 +6567,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) set_cc_op(s, CC_OP_EFLAGS); } else if (s->vm86) { if (s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_helper_iret_real(cpu_env, tcg_const_i32(dflag - 1)); set_cc_op(s, CC_OP_EFLAGS); @@ -6683,7 +6689,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x9c: /* pushf */ gen_svm_check_intercept(s, pc_start, SVM_EXIT_PUSHF); if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_update_cc_op(s); gen_helper_read_eflags(s->T0, cpu_env); @@ -6693,7 +6699,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x9d: /* popf */ gen_svm_check_intercept(s, pc_start, SVM_EXIT_POPF); if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { ot = gen_pop_T0(s); if (s->cpl == 0) { @@ -7055,7 +7061,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0xcd: /* int N */ val = x86_ldub_code(env, s); if (s->vm86 && s->iopl != 3) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_interrupt(s, val, pc_start - s->cs_base, s->pc - s->cs_base); } @@ -7078,13 +7084,13 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (s->cpl <= s->iopl) { gen_helper_cli(cpu_env); } else { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } } else { if (s->iopl == 3) { gen_helper_cli(cpu_env); } else { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } } break; @@ -7095,7 +7101,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) gen_jmp_im(s, s->pc - s->cs_base); gen_eob_inhibit_irq(s, true); } else { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } break; case 0x62: /* bound */ @@ -7188,7 +7194,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x130: /* wrmsr */ case 0x132: /* rdmsr */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_update_cc_op(s); gen_jmp_im(s, pc_start - s->cs_base); @@ -7220,7 +7226,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1) goto illegal_op; if (!s->pe) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_helper_sysenter(cpu_env); gen_eob(s); @@ -7231,7 +7237,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (CODE64(s) && env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1) goto illegal_op; if (!s->pe) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_helper_sysexit(cpu_env, tcg_const_i32(dflag - 1)); gen_eob(s); @@ -7250,7 +7256,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x107: /* sysret */ if (!s->pe) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_helper_sysret(cpu_env, tcg_const_i32(dflag - 1)); /* condition codes are modified only in long mode */ @@ -7272,7 +7278,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0xf4: /* hlt */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_update_cc_op(s); gen_jmp_im(s, pc_start - s->cs_base); @@ -7298,7 +7304,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!s->pe || s->vm86) goto illegal_op; if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_LDTR_WRITE); gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); @@ -7319,7 +7325,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) if (!s->pe || s->vm86) goto illegal_op; if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_TR_WRITE); gen_ldst_modrm(env, s, modrm, MO_16, OR_TMP0, 0); @@ -7435,7 +7441,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } tcg_gen_concat_tl_i64(s->tmp1_i64, cpu_regs[R_EAX], @@ -7452,7 +7458,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7477,7 +7483,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7490,7 +7496,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7505,7 +7511,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7519,7 +7525,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7543,7 +7549,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) goto illegal_op; } if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7553,7 +7559,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) CASE_MODRM_MEM_OP(2): /* lgdt */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_svm_check_intercept(s, pc_start, SVM_EXIT_GDTR_WRITE); @@ -7570,7 +7576,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) CASE_MODRM_MEM_OP(3): /* lidt */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_svm_check_intercept(s, pc_start, SVM_EXIT_IDTR_WRITE); @@ -7616,7 +7622,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; CASE_MODRM_OP(6): /* lmsw */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); @@ -7628,7 +7634,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) CASE_MODRM_MEM_OP(7): /* invlpg */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); break; } gen_update_cc_op(s); @@ -7643,7 +7649,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) #ifdef TARGET_X86_64 if (CODE64(s)) { if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { tcg_gen_mov_tl(s->T0, cpu_seg_base[R_GS]); tcg_gen_ld_tl(cpu_seg_base[R_GS], cpu_env, @@ -7679,7 +7685,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x108: /* invd */ case 0x109: /* wbinvd */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_svm_check_intercept(s, pc_start, (b & 2) ? SVM_EXIT_INVD : SVM_EXIT_WBINVD); /* nothing to do */ @@ -8003,7 +8009,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x120: /* mov reg, crN */ case 0x122: /* mov crN, reg */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { modrm = x86_ldub_code(env, s); /* Ignore the mod bits (assume (modrm&0xc0)==0xc0). @@ -8057,7 +8063,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) case 0x121: /* mov reg, drN */ case 0x123: /* mov drN, reg */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { #ifndef CONFIG_USER_ONLY modrm = x86_ldub_code(env, s); @@ -8093,7 +8099,7 @@ static target_ulong disas_insn(DisasContext *s, CPUState *cpu) break; case 0x106: /* clts */ if (s->cpl != 0) { - gen_exception(s, EXCP0D_GPF, pc_start - s->cs_base); + gen_exception_gpf(s); } else { gen_svm_check_intercept(s, pc_start, SVM_EXIT_WRITE_CR0); gen_helper_clts(cpu_env);

[01/50] target/i386: Split out gen_exception_gpf

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