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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id l8sm18988768wrx.83.2021.03.03.13.48.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Mar 2021 13:48:59 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v4 20/28] target/arm: Move code blocks around Date: Wed, 3 Mar 2021 22:47:00 +0100 Message-Id: <20210303214708.1727801-21-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210303214708.1727801-1-f4bug@amsat.org> References: <20210303214708.1727801-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::436; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x436.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Cornelia Huck , Richard Henderson , Laurent Vivier , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-s390x@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, Claudio Fontana , Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" To simplify later #ifdef'ry, move some code around. Signed-off-by: Philippe Mathieu-Daudé --- target/arm/internals.h | 16 ++++++++-------- target/arm/debug_helper.c | 22 +++++++++++----------- 2 files changed, 19 insertions(+), 19 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index d6ace004855..3fb295431ae 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -278,14 +278,6 @@ void hw_watchpoint_update_all(ARMCPU *cpu); * Update a QEMU breakpoint based on the information the guest has set in the * DBGBCR_EL1 and DBGBVR_EL1 registers. */ -void hw_breakpoint_update(ARMCPU *cpu, int n); -/* - * Update the QEMU breakpoints for every guest breakpoint. This does a - * complete delete-and-reinstate of the QEMU breakpoint list and so is - * suitable for use after migration or on reset. - */ -void hw_breakpoint_update_all(ARMCPU *cpu); - /* Callback function for checking if a watchpoint should trigger. */ bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); @@ -295,6 +287,14 @@ bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp); */ vaddr arm_adjust_watchpoint_address(CPUState *cs, vaddr addr, int len); +void hw_breakpoint_update(ARMCPU *cpu, int n); +/* + * Update the QEMU breakpoints for every guest breakpoint. This does a + * complete delete-and-reinstate of the QEMU breakpoint list and so is + * suitable for use after migration or on reset. + */ +void hw_breakpoint_update_all(ARMCPU *cpu); + /* Callback function for when a watchpoint or breakpoint triggers. */ void arm_debug_excp_handler(CPUState *cs); diff --git a/target/arm/debug_helper.c b/target/arm/debug_helper.c index 2ff72d47d19..c01d8524443 100644 --- a/target/arm/debug_helper.c +++ b/target/arm/debug_helper.c @@ -216,6 +216,17 @@ static bool check_watchpoints(ARMCPU *cpu) return false; } +bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp) +{ + /* + * Called by core code when a CPU watchpoint fires; need to check if this + * is also an architectural watchpoint match. + */ + ARMCPU *cpu = ARM_CPU(cs); + + return check_watchpoints(cpu); +} + static bool check_breakpoints(ARMCPU *cpu) { CPUARMState *env = &cpu->env; @@ -247,17 +258,6 @@ void HELPER(check_breakpoints)(CPUARMState *env) } } -bool arm_debug_check_watchpoint(CPUState *cs, CPUWatchpoint *wp) -{ - /* - * Called by core code when a CPU watchpoint fires; need to check if this - * is also an architectural watchpoint match. - */ - ARMCPU *cpu = ARM_CPU(cs); - - return check_watchpoints(cpu); -} - void arm_debug_excp_handler(CPUState *cs) { /*