[PULL,00/49] target-arm queue

Patchew URL: https://patchew.org/QEMU/20210305171515.1038-1-peter.maydell@linaro.org/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20210305171515.1038-1-peter.maydell@linaro.org Subject: [PULL 00/49] target-arm queue === TEST SCRIPT BEGIN === #!/bin/bash git rev-parse base > /dev/null || exit 0 git config --local diff.renamelimit 0 git config --local diff.renames True git config --local diff.algorithm histogram ./scripts/checkpatch.pl --mailback base.. === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/20210302175741.1079851-1-richard.henderson@linaro.org -> patchew/20210302175741.1079851-1-richard.henderson@linaro.org * [new tag] patchew/20210305171515.1038-1-peter.maydell@linaro.org -> patchew/20210305171515.1038-1-peter.maydell@linaro.org Switched to a new branch 'test' a128a42 hw/arm/mps2: Update old infocenter.arm.com URLs c5cecfe docs/system/arm/mps2.rst: Document the new mps3-an524 board c974bad hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524 03034f3 hw/arm/mps2-tz: Stub out USB controller for mps3-an524 c8c6e4f hw/arm/mps2-tz: Add new mps3-an524 board c93bbdd hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo 683f61e hw/arm/mps2-tz: Support ROMs as well as RAMs 7b42012 hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data 2bfdd74 hw/arm/mps2-tz: Make RAM arrangement board-specific 9435ecb hw/arm/mps2-tz: Allow boards to have different PPCInfo data cec62d3 hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs cc633cc hw/arm/mps2-tz: Move device IRQ info to data structures af1e340 hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts a3a6f5a hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI 8b6fbe6 hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524 257c22e hw/arm/mps2-tz: Make number of IRQs board-specific 0d0ac55 hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type a96ef27 hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board cc12957 hw/misc/mps2-fpgaio: Support SWITCH register cd656bc hw/misc/mps2-fpgaio: Make number of LEDs configurable by board 2a5e866 hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board 651303c hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511 4dfcf3b hw/misc/mps2-scc: Support configurable number of OSCCLK values 5a9f9d2 hw/arm/mps2-tz: Make SYSCLK frequency board-specific 436d742 hw/display/tcx: Drop unnecessary code for handling BGR format outputs cdb5b78 hw/display/omap_lcdc: Delete unnecessary macro 5172606 hw/display/omap_lcdc: Inline template header into C file c2d9cba hw/display/omap_lcdc: Fix coding style issues in template header bba3116 hw/display/omap_lcdc: Drop broken bigendian ifdef b8bb3aa hw/display/omap_lcdc: Expand out macros in template header 5a1b6dc hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite 0aaa9ef hw/display/tc6393xb: Expand out macros in template header 00c4d3a hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces 4b1ee3b hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces 15af7c5 target/arm/cpu: Update coding style to make checkpatch.pl happy 77c12d7 target/arm: Restrict v8M IDAU to TCG 9334376 target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks 4ca60fd virtio-mmio: improve virtio-mmio get_dev_path alog 2b83d8d hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init() d98a546 target/arm: Speed up aarch64 TBL/TBX 6a40c8a hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property 44ed555 tests/qtests: Add npcm7xx emc model test e12a88d hw/arm: Add npcm7xx emc model 958ec8c hw/net: Add npcm7xx emc model c4aea19 target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU b71c5c9 target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU cf87488d target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe d1188cb sbsa-ref: add 'max' to list of allowed cpus 4a8e7d0 sbsa-ref: remove cortex-a53 from list of supported cpus === OUTPUT BEGIN === 1/49 Checking commit 4a8e7d0e7a4d (sbsa-ref: remove cortex-a53 from list of supported cpus) 2/49 Checking commit d1188cb0e303 (sbsa-ref: add 'max' to list of allowed cpus) 3/49 Checking commit cf87488d14f4 (target/arm: Add support for FEAT_SSBS, Speculative Store Bypass Safe) 4/49 Checking commit b71c5c98d6a3 (target/arm: Enable FEAT_SSBS for "max" AARCH64 CPU) 5/49 Checking commit c4aea19ccb0c (target/arm: Set ID_PFR2.SSBS to 1 for "max" 32-bit CPU) 6/49 Checking commit 958ec8c49e31 (hw/net: Add npcm7xx emc model) Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529. WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #37: new file mode 100644 total: 0 errors, 1 warnings, 1170 lines checked Patch 6/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 7/49 Checking commit e12a88dc0fac (hw/arm: Add npcm7xx emc model) 8/49 Checking commit 44ed555ec33f (tests/qtests: Add npcm7xx emc model test) Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529. WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #34: new file mode 100644 WARNING: Block comments use a leading /* on a separate line #495: FILE: tests/qtest/npcm7xx_emc-test.c:457: + 0 /* padding enable = 0 */); WARNING: Block comments use a leading /* on a separate line #508: FILE: tests/qtest/npcm7xx_emc-test.c:470: + 0 /* length filled in later */); WARNING: Block comments use a leading /* on a separate line #607: FILE: tests/qtest/npcm7xx_emc-test.c:569: + /*is_tx=*/true)); WARNING: Block comments use a leading /* on a separate line #648: FILE: tests/qtest/npcm7xx_emc-test.c:610: + 0 /* length (filled in later) */); WARNING: Block comments use a leading /* on a separate line #726: FILE: tests/qtest/npcm7xx_emc-test.c:688: + g_assert_true(emc_wait_irq(qts, mod, RX_STEP_COUNT, /*is_tx=*/false)); WARNING: Block comments use a leading /* on a separate line #800: FILE: tests/qtest/npcm7xx_emc-test.c:762: + g_assert_true(emc_wait_irq(qts, mod, RX_STEP_COUNT, /*is_tx=*/false)); WARNING: Block comments use a leading /* on a separate line #842: FILE: tests/qtest/npcm7xx_emc-test.c:804: + emc_send_verify(qts, td->module, test_sockets[0], /*with_irq=*/false); WARNING: Block comments use a leading /* on a separate line #843: FILE: tests/qtest/npcm7xx_emc-test.c:805: + emc_send_verify(qts, td->module, test_sockets[0], /*with_irq=*/true); WARNING: Block comments use a leading /* on a separate line #867: FILE: tests/qtest/npcm7xx_emc-test.c:829: + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/false); WARNING: Block comments use a leading /* on a separate line #868: FILE: tests/qtest/npcm7xx_emc-test.c:830: + emc_recv_verify(qts, td->module, test_sockets[0], /*with_irq=*/true); total: 0 errors, 11 warnings, 871 lines checked Patch 8/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 9/49 Checking commit 6a40c8a3f8e1 (hw/arm/xlnx-zynqmp: Remove obsolete 'has_rpu' property) 10/49 Checking commit d98a54675eef (target/arm: Speed up aarch64 TBL/TBX) 11/49 Checking commit 2b83d8d61aec (hw/i2c/npcm7xx_smbus: Simplify npcm7xx_smbus_init()) 12/49 Checking commit 4ca60fda63d5 (virtio-mmio: improve virtio-mmio get_dev_path alog) 13/49 Checking commit 9334376c7313 (target/arm: Use TCF0 and TFSRE0 for unprivileged tag checks) 14/49 Checking commit 77c12d7c002b (target/arm: Restrict v8M IDAU to TCG) 15/49 Checking commit 15af7c5dd88d (target/arm/cpu: Update coding style to make checkpatch.pl happy) 16/49 Checking commit 4b1ee3b23040 (hw/arm/musicpal: Remove dead code for non-32-bit-RGB surfaces) 17/49 Checking commit 00c4d3a5d6f5 (hw/display/tc6393xb: Remove dead code for handling non-32bpp surfaces) 18/49 Checking commit 0aaa9ef225b7 (hw/display/tc6393xb: Expand out macros in template header) 19/49 Checking commit 5a1b6dcf5d7c (hw/display/tc6393xb: Inline tc6393xb_draw_graphic32() at its callsite) Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529. WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #61: deleted file mode 100644 total: 0 errors, 1 warnings, 31 lines checked Patch 19/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 20/49 Checking commit b8bb3aa3cd7e (hw/display/omap_lcdc: Expand out macros in template header) 21/49 Checking commit bba3116e94be (hw/display/omap_lcdc: Drop broken bigendian ifdef) 22/49 Checking commit c2d9cbacfb44 (hw/display/omap_lcdc: Fix coding style issues in template header) 23/49 Checking commit 51726060a8b6 (hw/display/omap_lcdc: Inline template header into C file) Use of uninitialized value $acpi_testexpected in string eq at ./scripts/checkpatch.pl line 1529. WARNING: added, moved or deleted file(s), does MAINTAINERS need updating? #21: deleted file mode 100644 total: 0 errors, 1 warnings, 133 lines checked Patch 23/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 24/49 Checking commit cdb5b782ed93 (hw/display/omap_lcdc: Delete unnecessary macro) 25/49 Checking commit 436d74285838 (hw/display/tcx: Drop unnecessary code for handling BGR format outputs) 26/49 Checking commit 5a9f9d26020d (hw/arm/mps2-tz: Make SYSCLK frequency board-specific) 27/49 Checking commit 4dfcf3b04881 (hw/misc/mps2-scc: Support configurable number of OSCCLK values) 28/49 Checking commit 651303c54257 (hw/arm/mps2-tz: Correct the OSCCLK settings for mps2-an505 and mps2-an511) 29/49 Checking commit 2a5e866ec751 (hw/arm/mps2-tz: Make the OSCCLK settings be configurable per-board) 30/49 Checking commit cd656bc372e2 (hw/misc/mps2-fpgaio: Make number of LEDs configurable by board) 31/49 Checking commit cc1295744a9a (hw/misc/mps2-fpgaio: Support SWITCH register) 32/49 Checking commit a96ef27fc028 (hw/arm/mps2-tz: Make FPGAIO switch and LED config per-board) 33/49 Checking commit 0d0ac5513c11 (hw/arm/mps2-tz: Condition IRQ splitting on number of CPUs, not board type) 34/49 Checking commit 257c22ea9d17 (hw/arm/mps2-tz: Make number of IRQs board-specific) 35/49 Checking commit 8b6fbe6e3518 (hw/misc/mps2-scc: Implement CFG_REG5 and CFG_REG6 for MPS3 AN524) 36/49 Checking commit a3a6f5a4ba34 (hw/arm/mps2-tz: Correct wrong interrupt numbers for DMA and SPI) 37/49 Checking commit af1e340671db (hw/arm/mps2-tz: Allow PPCPortInfo structures to specify device interrupts) 38/49 Checking commit cc633cc95311 (hw/arm/mps2-tz: Move device IRQ info to data structures) WARNING: line over 80 characters #117: FILE: hw/arm/mps2-tz.c:557: + { "uart0", make_uart, &mms->uart[0], 0x40200000, 0x1000, { 32, 33, 42 } }, WARNING: line over 80 characters #118: FILE: hw/arm/mps2-tz.c:558: + { "uart1", make_uart, &mms->uart[1], 0x40201000, 0x1000, { 34, 35, 43 } }, WARNING: line over 80 characters #119: FILE: hw/arm/mps2-tz.c:559: + { "uart2", make_uart, &mms->uart[2], 0x40202000, 0x1000, { 36, 37, 44 } }, WARNING: line over 80 characters #120: FILE: hw/arm/mps2-tz.c:560: + { "uart3", make_uart, &mms->uart[3], 0x40203000, 0x1000, { 38, 39, 45 } }, WARNING: line over 80 characters #121: FILE: hw/arm/mps2-tz.c:561: + { "uart4", make_uart, &mms->uart[4], 0x40204000, 0x1000, { 40, 41, 46 } }, WARNING: line over 80 characters #139: FILE: hw/arm/mps2-tz.c:588: + { "dma0", make_dma, &mms->dma[0], 0x40110000, 0x1000, { 58, 56, 57 } }, WARNING: line over 80 characters #140: FILE: hw/arm/mps2-tz.c:589: + { "dma1", make_dma, &mms->dma[1], 0x40111000, 0x1000, { 61, 59, 60 } }, WARNING: line over 80 characters #141: FILE: hw/arm/mps2-tz.c:590: + { "dma2", make_dma, &mms->dma[2], 0x40112000, 0x1000, { 64, 62, 63 } }, WARNING: line over 80 characters #142: FILE: hw/arm/mps2-tz.c:591: + { "dma3", make_dma, &mms->dma[3], 0x40113000, 0x1000, { 67, 65, 66 } }, total: 0 errors, 9 warnings, 114 lines checked Patch 38/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 39/49 Checking commit cec62d3d5e30 (hw/arm/mps2-tz: Size the uart-irq-orgate based on the number of UARTs) 40/49 Checking commit 9435ecbaa76b (hw/arm/mps2-tz: Allow boards to have different PPCInfo data) 41/49 Checking commit 2bfdd74acf98 (hw/arm/mps2-tz: Make RAM arrangement board-specific) 42/49 Checking commit 7b42012b01a2 (hw/arm/mps2-tz: Set MachineClass default_ram info from RAMInfo data) 43/49 Checking commit 683f61e6e05f (hw/arm/mps2-tz: Support ROMs as well as RAMs) 44/49 Checking commit c93bbdd25b50 (hw/arm/mps2-tz: Get armv7m_load_kernel() size argument from RAMInfo) 45/49 Checking commit c8c6e4fa6b35 (hw/arm/mps2-tz: Add new mps3-an524 board) WARNING: Block comments use a leading /* on a separate line #167: FILE: hw/arm/mps2-tz.c:784: + { /* port 7 reserved */ }, WARNING: line over 80 characters #177: FILE: hw/arm/mps2-tz.c:794: + { "uart0", make_uart, &mms->uart[0], 0x41303000, 0x1000, { 32, 33, 42 } }, WARNING: line over 80 characters #178: FILE: hw/arm/mps2-tz.c:795: + { "uart1", make_uart, &mms->uart[1], 0x41304000, 0x1000, { 34, 35, 43 } }, WARNING: line over 80 characters #179: FILE: hw/arm/mps2-tz.c:796: + { "uart2", make_uart, &mms->uart[2], 0x41305000, 0x1000, { 36, 37, 44 } }, WARNING: line over 80 characters #180: FILE: hw/arm/mps2-tz.c:797: + { "uart3", make_uart, &mms->uart[3], 0x41306000, 0x1000, { 38, 39, 45 } }, WARNING: line over 80 characters #181: FILE: hw/arm/mps2-tz.c:798: + { "uart4", make_uart, &mms->uart[4], 0x41307000, 0x1000, { 40, 41, 46 } }, ERROR: line over 90 characters #182: FILE: hw/arm/mps2-tz.c:799: + { "uart5", make_uart, &mms->uart[5], 0x41308000, 0x1000, { 124, 125, 126 } }, WARNING: Block comments use a leading /* on a separate line #184: FILE: hw/arm/mps2-tz.c:801: + { /* port 9 reserved */ }, total: 1 errors, 7 warnings, 224 lines checked Patch 45/49 has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. 46/49 Checking commit 03034f318f0b (hw/arm/mps2-tz: Stub out USB controller for mps3-an524) 47/49 Checking commit c974bad6b69a (hw/arm/mps2-tz: Provide PL031 RTC on mps3-an524) 48/49 Checking commit c5cecfe0cca4 (docs/system/arm/mps2.rst: Document the new mps3-an524 board) 49/49 Checking commit a128a42d05d7 (hw/arm/mps2: Update old infocenter.arm.com URLs) === OUTPUT END === Test command exited with code: 1 The full log is available at http://patchew.org/logs/20210305171515.1038-1-peter.maydell@linaro.org/testing.checkpatch/?type=message. --- Email generated automatically by Patchew [https://patchew.org/]. Please send your feedback to patchew-devel@redhat.com

Message ID	20210305171515.1038-1-peter.maydell@linaro.org (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=6Jgg=ID=nongnu.org=qemu-devel-bounces+qemu-devel=archiver.kernel.org@kernel.org> DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6B85564DEC From: Peter Maydell <peter.maydell@linaro.org> To: qemu-devel@nongnu.org Subject: [PULL 00/49] target-arm queue Date: Fri, 5 Mar 2021 17:14:26 +0000 Message-Id: <20210305171515.1038-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::444; envelope-from=peter.maydell@linaro.org; helo=mail-wr1-x444.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action Precedence: list Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org>

[PULL,00/49] target-arm queue

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