From patchwork Fri Mar 12 17:22:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 12135565 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0D693C433E0 for ; Fri, 12 Mar 2021 17:37:14 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 8976064E68 for ; Fri, 12 Mar 2021 17:37:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 8976064E68 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:59886 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lKliq-0001v7-Ko for qemu-devel@archiver.kernel.org; Fri, 12 Mar 2021 12:37:12 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:57552) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlVM-0006RA-En for qemu-devel@nongnu.org; Fri, 12 Mar 2021 12:23:16 -0500 Received: from mx2.suse.de ([195.135.220.15]:33488) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lKlVF-0008TC-Eu for qemu-devel@nongnu.org; Fri, 12 Mar 2021 12:23:16 -0500 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 1F77BAF87; Fri, 12 Mar 2021 17:22:50 +0000 (UTC) From: Claudio Fontana To: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [RFC v7 12/42] target/arm: only perform TCG cpu and machine inits if TCG enabled Date: Fri, 12 Mar 2021 18:22:13 +0100 Message-Id: <20210312172243.25334-13-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210312172243.25334-1-cfontana@suse.de> References: <20210312172243.25334-1-cfontana@suse.de> MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" of note, cpreg lists were previously initialized by TCG first, and then thrown away and replaced with the data coming from KVM. Now we just initialize once, either for TCG or for KVM. Signed-off-by: Claudio Fontana --- target/arm/cpu.c | 32 ++++++++++++++++++-------------- target/arm/kvm.c | 18 +++++++++--------- target/arm/machine.c | 20 +++++++++++++------- 3 files changed, 40 insertions(+), 30 deletions(-) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 048c904933..e47b09fe18 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -436,9 +436,11 @@ static void arm_cpu_reset(DeviceState *dev) } #endif - hw_breakpoint_update_all(cpu); - hw_watchpoint_update_all(cpu); - arm_rebuild_hflags(env); + if (tcg_enabled()) { + hw_breakpoint_update_all(cpu); + hw_watchpoint_update_all(cpu); + arm_rebuild_hflags(env); + } } static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx, @@ -1319,6 +1321,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) } } +#ifdef CONFIG_TCG { uint64_t scale; @@ -1344,7 +1347,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) cpu->gt_timer[GTIMER_HYPVIRT] = timer_new(QEMU_CLOCK_VIRTUAL, scale, arm_gt_hvtimer_cb, cpu); } -#endif +#endif /* CONFIG_TCG */ +#endif /* !CONFIG_USER_ONLY */ cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { @@ -1645,17 +1649,16 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) unset_feature(env, ARM_FEATURE_PMU); } if (arm_feature(env, ARM_FEATURE_PMU)) { - pmu_init(cpu); - - if (!kvm_enabled()) { + if (tcg_enabled()) { + pmu_init(cpu); arm_register_pre_el_change_hook(cpu, &pmu_pre_el_change, 0); arm_register_el_change_hook(cpu, &pmu_post_el_change, 0); - } #ifndef CONFIG_USER_ONLY - cpu->pmu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, arm_pmu_timer_cb, - cpu); + cpu->pmu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, arm_pmu_timer_cb, + cpu); #endif + } } else { cpu->isar.id_aa64dfr0 = FIELD_DP64(cpu->isar.id_aa64dfr0, ID_AA64DFR0, PMUVER, 0); @@ -1738,10 +1741,11 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) set_feature(env, ARM_FEATURE_VBAR); } - register_cp_regs_for_features(cpu); - arm_cpu_register_gdb_regs_for_features(cpu); - - init_cpreg_list(cpu); + if (tcg_enabled()) { + register_cp_regs_for_features(cpu); + arm_cpu_register_gdb_regs_for_features(cpu); + init_cpreg_list(cpu); + } #ifndef CONFIG_USER_ONLY MachineState *ms = MACHINE(qdev_get_machine()); diff --git a/target/arm/kvm.c b/target/arm/kvm.c index 00e124c812..e04aa7281a 100644 --- a/target/arm/kvm.c +++ b/target/arm/kvm.c @@ -429,9 +429,11 @@ static uint64_t *kvm_arm_get_cpreg_ptr(ARMCPU *cpu, uint64_t regidx) return &cpu->cpreg_values[res - cpu->cpreg_indexes]; } -/* Initialize the ARMCPU cpreg list according to the kernel's - * definition of what CPU registers it knows about (and throw away - * the previous TCG-created cpreg list). +/* + * Initialize the ARMCPU cpreg list according to the kernel's + * definition of what CPU registers it knows about. + * + * The parallel for TCG is init_cpreg_list() in tcg/ */ int kvm_arm_init_cpreg_list(ARMCPU *cpu) { @@ -473,12 +475,10 @@ int kvm_arm_init_cpreg_list(ARMCPU *cpu) arraylen++; } - cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); - cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); - cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, - arraylen); - cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, - arraylen); + cpu->cpreg_indexes = g_new(uint64_t, arraylen); + cpu->cpreg_values = g_new(uint64_t, arraylen); + cpu->cpreg_vmstate_indexes = g_new(uint64_t, arraylen); + cpu->cpreg_vmstate_values = g_new(uint64_t, arraylen); cpu->cpreg_array_len = arraylen; cpu->cpreg_vmstate_array_len = arraylen; diff --git a/target/arm/machine.c b/target/arm/machine.c index e568662cca..2982e8d7f4 100644 --- a/target/arm/machine.c +++ b/target/arm/machine.c @@ -2,6 +2,7 @@ #include "cpu.h" #include "qemu/error-report.h" #include "sysemu/kvm.h" +#include "sysemu/tcg.h" #include "kvm_arm.h" #include "internals.h" #include "migration/cpu.h" @@ -635,7 +636,7 @@ static int cpu_pre_save(void *opaque) { ARMCPU *cpu = opaque; - if (!kvm_enabled()) { + if (tcg_enabled()) { pmu_op_start(&cpu->env); } @@ -670,7 +671,7 @@ static int cpu_post_save(void *opaque) { ARMCPU *cpu = opaque; - if (!kvm_enabled()) { + if (tcg_enabled()) { pmu_op_finish(&cpu->env); } @@ -689,7 +690,7 @@ static int cpu_pre_load(void *opaque) */ env->irq_line_state = UINT32_MAX; - if (!kvm_enabled()) { + if (tcg_enabled()) { pmu_op_start(&cpu->env); } @@ -759,13 +760,13 @@ static int cpu_post_load(void *opaque, int version_id) } } - hw_breakpoint_update_all(cpu); - hw_watchpoint_update_all(cpu); + if (tcg_enabled()) { + hw_breakpoint_update_all(cpu); + hw_watchpoint_update_all(cpu); - if (!kvm_enabled()) { pmu_op_finish(&cpu->env); + arm_rebuild_hflags(&cpu->env); } - arm_rebuild_hflags(&cpu->env); return 0; } @@ -815,8 +816,13 @@ const VMStateDescription vmstate_arm_cpu = { VMSTATE_UINT32(env.exception.syndrome, ARMCPU), VMSTATE_UINT32(env.exception.fsr, ARMCPU), VMSTATE_UINT64(env.exception.vaddress, ARMCPU), +#ifdef CONFIG_TCG VMSTATE_TIMER_PTR(gt_timer[GTIMER_PHYS], ARMCPU), VMSTATE_TIMER_PTR(gt_timer[GTIMER_VIRT], ARMCPU), +#else + VMSTATE_UNUSED(sizeof(QEMUTimer *)), + VMSTATE_UNUSED(sizeof(QEMUTimer *)), +#endif /* CONFIG_TCG */ { .name = "power_state", .version_id = 0,