@@ -1752,6 +1752,7 @@ modules = {}
hw_arch = {}
target_arch = {}
target_softmmu_arch = {}
+target_user_arch = {}
###############
# Trace files #
@@ -2150,6 +2151,10 @@ foreach target : target_dirs
abi = config_target['TARGET_ABI_DIR']
target_type='user'
qemu_target_name = 'qemu-' + target_name
+ t = target_user_arch[arch].apply(config_target, strict: false)
+ arch_srcs += t.sources()
+ arch_deps += t.dependencies()
+
if 'CONFIG_LINUX_USER' in config_target
base_dir = 'linux-user'
target_inc += include_directories('linux-user/host/' / config_host['ARCH'])
@@ -14,5 +14,8 @@ alpha_ss.add(files(
alpha_softmmu_ss = ss.source_set()
alpha_softmmu_ss.add(files('machine.c'))
+alpha_user_ss = ss.source_set()
+
target_arch += {'alpha': alpha_ss}
target_softmmu_arch += {'alpha': alpha_softmmu_ss}
+target_user_arch += {'alpha': alpha_user_ss}
@@ -53,6 +53,8 @@ arm_softmmu_ss.add(files(
'monitor.c',
'psci.c',
))
+arm_user_ss = ss.source_set()
target_arch += {'arm': arm_ss}
target_softmmu_arch += {'arm': arm_softmmu_ss}
+target_user_arch += {'arm': arm_user_ss}
@@ -10,5 +10,8 @@ cris_ss.add(files(
cris_softmmu_ss = ss.source_set()
cris_softmmu_ss.add(files('mmu.c', 'machine.c'))
+cris_user_ss = ss.source_set()
+
target_arch += {'cris': cris_ss}
target_softmmu_arch += {'cris': cris_softmmu_ss}
+target_user_arch += {'cris': cris_user_ss}
@@ -188,4 +188,7 @@ hexagon_ss.add(files(
'conv_emu.c',
))
+hexagon_user_ss = ss.source_set()
+
target_arch += {'hexagon': hexagon_ss}
+target_user_arch += {'hexagon': hexagon_user_ss}
@@ -15,5 +15,8 @@ hppa_ss.add(files(
hppa_softmmu_ss = ss.source_set()
hppa_softmmu_ss.add(files('machine.c'))
+hppa_user_ss = ss.source_set()
+
target_arch += {'hppa': hppa_ss}
target_softmmu_arch += {'hppa': hppa_softmmu_ss}
+target_user_arch += {'hppa': hppa_user_ss}
@@ -19,6 +19,7 @@ i386_softmmu_ss.add(files(
'machine.c',
'monitor.c',
))
+i386_user_ss = ss.source_set()
subdir('kvm')
subdir('hax')
@@ -28,3 +29,4 @@ subdir('tcg')
target_arch += {'i386': i386_ss}
target_softmmu_arch += {'i386': i386_softmmu_ss}
+target_user_arch += {'i386': i386_user_ss}
@@ -13,5 +13,8 @@ m68k_ss.add(files(
m68k_softmmu_ss = ss.source_set()
m68k_softmmu_ss.add(files('monitor.c'))
+m68k_user_ss = ss.source_set()
+
target_arch += {'m68k': m68k_ss}
target_softmmu_arch += {'m68k': m68k_softmmu_ss}
+target_user_arch += {'m68k': m68k_user_ss}
@@ -16,5 +16,8 @@ microblaze_softmmu_ss.add(files(
'machine.c',
))
+microblaze_user_ss = ss.source_set()
+
target_arch += {'microblaze': microblaze_ss}
target_softmmu_arch += {'microblaze': microblaze_softmmu_ss}
+target_user_arch += {'microblaze': microblaze_user_ss}
@@ -47,6 +47,8 @@ mips_softmmu_ss.add(when: 'CONFIG_TCG', if_true: files(
))
mips_ss.add_all(when: 'CONFIG_TCG', if_true: [mips_tcg_ss])
+mips_user_ss = ss.source_set()
target_arch += {'mips': mips_ss}
target_softmmu_arch += {'mips': mips_softmmu_ss}
+target_user_arch += {'mips': mips_user_ss}
@@ -11,5 +11,8 @@ nios2_ss.add(files(
nios2_softmmu_ss = ss.source_set()
nios2_softmmu_ss.add(files('monitor.c'))
+nios2_user_ss = ss.source_set()
+
target_arch += {'nios2': nios2_ss}
target_softmmu_arch += {'nios2': nios2_softmmu_ss}
+target_user_arch += {'nios2': nios2_user_ss}
@@ -19,5 +19,8 @@ openrisc_ss.add(files(
openrisc_softmmu_ss = ss.source_set()
openrisc_softmmu_ss.add(files('machine.c'))
+openrisc_user_ss = ss.source_set()
+
target_arch += {'openrisc': openrisc_ss}
target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}
+target_user_arch += {'openrisc': openrisc_user_ss}
@@ -33,5 +33,8 @@ ppc_softmmu_ss.add(when: 'TARGET_PPC64', if_true: files(
'mmu-radix64.c',
))
+ppc_user_ss = ss.source_set()
+
target_arch += {'ppc': ppc_ss}
target_softmmu_arch += {'ppc': ppc_softmmu_ss}
+target_user_arch += {'ppc': ppc_user_ss}
@@ -32,5 +32,8 @@ riscv_softmmu_ss.add(files(
'machine.c'
))
+riscv_user_ss = ss.source_set()
+
target_arch += {'riscv': riscv_ss}
target_softmmu_arch += {'riscv': riscv_softmmu_ss}
+target_user_arch += {'riscv': riscv_user_ss}
@@ -58,5 +58,8 @@ if host_machine.cpu_family() == 's390x' and cc.has_link_argument('-Wl,--s390-pgs
if_true: declare_dependency(link_args: ['-Wl,--s390-pgste']))
endif
+s390x_user_ss = ss.source_set()
+
target_arch += {'s390x': s390x_ss}
target_softmmu_arch += {'s390x': s390x_softmmu_ss}
+target_user_arch += {'s390x': s390x_user_ss}
@@ -10,5 +10,8 @@ sh4_ss.add(files(
sh4_softmmu_ss = ss.source_set()
sh4_softmmu_ss.add(files('monitor.c'))
+sh4_user_ss = ss.source_set()
+
target_arch += {'sh4': sh4_ss}
target_softmmu_arch += {'sh4': sh4_softmmu_ss}
+target_user_arch += {'sh4': sh4_user_ss}
@@ -19,5 +19,8 @@ sparc_softmmu_ss.add(files(
'monitor.c',
))
+sparc_user_ss = ss.source_set()
+
target_arch += {'sparc': sparc_ss}
target_softmmu_arch += {'sparc': sparc_softmmu_ss}
+target_user_arch += {'sparc': sparc_user_ss}
@@ -11,5 +11,8 @@ tricore_ss.add(zlib)
tricore_softmmu_ss = ss.source_set()
+tricore_user_ss = ss.source_set()
+
target_arch += {'tricore': tricore_ss}
target_softmmu_arch += {'tricore': tricore_softmmu_ss}
+target_user_arch += {'tricore': tricore_user_ss}
@@ -28,5 +28,8 @@ xtensa_softmmu_ss.add(files(
'xtensa-semi.c',
))
+xtensa_user_ss = ss.source_set()
+
target_arch += {'xtensa': xtensa_ss}
target_softmmu_arch += {'xtensa': xtensa_softmmu_ss}
+target_user_arch += {'xtensa': xtensa_user_ss}