| Message ID | 20210323154639.23477-16-cfontana@suse.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm cleanup experiment for kvm-only build | expand |
On 3/23/21 9:46 AM, Claudio Fontana wrote: > this function is used for kvm too, add it to the > cpu-common module. > > Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > /* #endif TARGET_AARCH64 , see matching comment above */ > + > +uint64_t arm_sctlr(CPUARMState *env, int el) > +{ > + /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */ > + if (el == 0) { > + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0); > + el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0) > + ? 2 : 1; I only thought of it because of the comment, but *E20_0 is aarch64 only; aarch32 always uses el = 1 here. ;-) r~
On 3/24/21 11:07 PM, Richard Henderson wrote: > On 3/23/21 9:46 AM, Claudio Fontana wrote: >> this function is used for kvm too, add it to the >> cpu-common module. >> >> Signed-off-by: Claudio Fontana <cfontana@suse.de> > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > >> /* #endif TARGET_AARCH64 , see matching comment above */ >> + >> +uint64_t arm_sctlr(CPUARMState *env, int el) >> +{ >> + /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */ >> + if (el == 0) { >> + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0); >> + el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0) >> + ? 2 : 1; > > I only thought of it because of the comment, but *E20_0 is aarch64 only; > aarch32 always uses el = 1 here. ;-) > > > r~ In this case, maybe we should do: uint64_t arm_sctlr(CPUARMState *env, int el) { /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */ if (el == 0) { #ifdef TARGET_AARCH64 ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0); el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0) ? 2 : 1; #else el = 1; #endif } return env->cp15.sctlr_el[el]; } ? Thanks, Claudio
diff --git a/target/arm/cpu-common.c b/target/arm/cpu-common.c index 540793e4c0..dc7a5049a7 100644 --- a/target/arm/cpu-common.c +++ b/target/arm/cpu-common.c @@ -274,3 +274,14 @@ uint32_t sve_zcr_len_for_el(CPUARMState *env, int el) } /* #endif TARGET_AARCH64 , see matching comment above */ + +uint64_t arm_sctlr(CPUARMState *env, int el) +{ + /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */ + if (el == 0) { + ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0); + el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0) + ? 2 : 1; + } + return env->cp15.sctlr_el[el]; +} diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c index ec0b812f96..a44b01a712 100644 --- a/target/arm/tcg/helper.c +++ b/target/arm/tcg/helper.c @@ -1743,17 +1743,6 @@ void arm_cpu_do_interrupt(CPUState *cs) } #endif /* !CONFIG_USER_ONLY */ -uint64_t arm_sctlr(CPUARMState *env, int el) -{ - /* Only EL0 needs to be adjusted for EL1&0 or EL2&0. */ - if (el == 0) { - ARMMMUIdx mmu_idx = arm_mmu_idx_el(env, 0); - el = (mmu_idx == ARMMMUIdx_E20_0 || mmu_idx == ARMMMUIdx_SE20_0) - ? 2 : 1; - } - return env->cp15.sctlr_el[el]; -} - /* Returns true if the stage 1 translation regime is using LPAE format page * tables. Used when raising alignment exceptions, whose FSR changes depending * on whether the long or short descriptor format is in use. */
this function is used for kvm too, add it to the cpu-common module. Signed-off-by: Claudio Fontana <cfontana@suse.de> --- target/arm/cpu-common.c | 11 +++++++++++ target/arm/tcg/helper.c | 11 ----------- 2 files changed, 11 insertions(+), 11 deletions(-)