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Tue, 13 Apr 2021 13:23:54 +0000 (GMT) From: Ilya Leoshkevich To: Richard Henderson , Paolo Bonzini Subject: [PATCH] accel/tcg: Fix translation exception on invalid instruction Date: Tue, 13 Apr 2021 15:23:49 +0200 Message-Id: <20210413132349.20520-1-iii@linux.ibm.com> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: BmwhPKNhvIMFxSuey8nqDM2H6Ga6InXI X-Proofpoint-ORIG-GUID: vObAFJ7Uwd3bSUOUerHRbKa47nZzOhxC X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.761 definitions=2021-04-13_07:2021-04-13, 2021-04-13 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 mlxlogscore=999 impostorscore=0 clxscore=1011 lowpriorityscore=0 bulkscore=0 malwarescore=0 mlxscore=0 suspectscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2104060000 definitions=main-2104130091 Received-SPF: pass client-ip=148.163.158.5; envelope-from=iii@linux.ibm.com; helo=mx0b-001b2d01.pphosted.com X-Spam_score_int: -26 X-Spam_score: -2.7 X-Spam_bar: -- X-Spam_report: (-2.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Borntraeger , Cornelia Huck , qemu-devel@nongnu.org, Ilya Leoshkevich , David Hildenbrand Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Hitting an uretprobe in a s390x TCG guest causes a SIGSEGV. What happens is: * uretprobe maps a userspace page containing an invalid instruction. * uretprobe replaces the target function's return address with the address of that page. * When tb_gen_code() is called on that page, tb->size ends up being 0 (because the page starts with the invalid instruction), which causes virt_page2 to point to the previous page. * The previous page is not mapped, so this causes a spurious translation exception. Fix by special-casing tb->size == 0: since there is no useful code, we don't need to link pages in this case. Signed-off-by: Ilya Leoshkevich --- accel/tcg/translate-all.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index ba6ab09790..77043b98c4 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1848,7 +1848,6 @@ TranslationBlock *tb_gen_code(CPUState *cpu, CPUArchState *env = cpu->env_ptr; TranslationBlock *tb, *existing_tb; tb_page_addr_t phys_pc, phys_page2; - target_ulong virt_page2; tcg_insn_unit *gen_code_buf; int gen_code_size, search_size, max_insns; #ifdef CONFIG_PROFILER @@ -2085,11 +2084,15 @@ TranslationBlock *tb_gen_code(CPUState *cpu, } /* check next page if needed */ - virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK; phys_page2 = -1; - if ((pc & TARGET_PAGE_MASK) != virt_page2) { - phys_page2 = get_page_addr_code(env, virt_page2); + if (tb->size != 0) { + target_ulong virt_page2 = (pc + tb->size - 1) & TARGET_PAGE_MASK; + + if ((pc & TARGET_PAGE_MASK) != virt_page2) { + phys_page2 = get_page_addr_code(env, virt_page2); + } } + /* * No explicit memory barrier is required -- tb_link_page() makes the * TB visible in a consistent state.