From patchwork Fri Apr 16 16:27:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 12208393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 047FCC433B4 for ; Fri, 16 Apr 2021 17:36:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 977AA6124B for ; Fri, 16 Apr 2021 17:36:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 977AA6124B Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=suse.de Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:44750 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lXSO1-0002GF-DK for qemu-devel@archiver.kernel.org; Fri, 16 Apr 2021 13:36:09 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46720) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRLM-0004bD-GF for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:20 -0400 Received: from mx2.suse.de ([195.135.220.15]:44854) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRL6-0001Vd-OQ for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:20 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 08CBEB2F1; Fri, 16 Apr 2021 16:28:45 +0000 (UTC) From: Claudio Fontana To: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [RFC v14 41/80] target/arm: move cpu_tcg to tcg/tcg-cpu-models.c Date: Fri, 16 Apr 2021 18:27:45 +0200 Message-Id: <20210416162824.25131-42-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210416162824.25131-1-cfontana@suse.de> References: <20210416162824.25131-1-cfontana@suse.de> MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" move the module containing cpu models definitions for 32bit TCG-only CPUs to tcg/ and rename it for clarity. Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson --- target/arm/{cpu_tcg.c => tcg/tcg-cpu-models.c} | 9 +-------- target/arm/meson.build | 4 ---- target/arm/tcg/meson.build | 1 + 3 files changed, 2 insertions(+), 12 deletions(-) rename target/arm/{cpu_tcg.c => tcg/tcg-cpu-models.c} (99%) diff --git a/target/arm/cpu_tcg.c b/target/arm/tcg/tcg-cpu-models.c similarity index 99% rename from target/arm/cpu_tcg.c rename to target/arm/tcg/tcg-cpu-models.c index 54df5a8e77..5dc8e2c93f 100644 --- a/target/arm/cpu_tcg.c +++ b/target/arm/tcg/tcg-cpu-models.c @@ -1,5 +1,5 @@ /* - * QEMU ARM TCG CPUs. + * QEMU ARM TCG-only CPUs. * * Copyright (c) 2012 SUSE LINUX Products GmbH * @@ -9,10 +9,7 @@ */ #include "qemu/osdep.h" -#include "cpu.h" -#ifdef CONFIG_TCG #include "tcg/tcg-cpu.h" -#endif /* CONFIG_TCG */ #include "internals.h" #include "target/arm/idau.h" #if !defined(CONFIG_USER_ONLY) @@ -24,7 +21,6 @@ /* CPU models. These are not needed for the AArch64 linux-user build. */ #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64) -#ifdef CONFIG_TCG static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) { CPUClass *cc = CPU_GET_CLASS(cs); @@ -48,7 +44,6 @@ static bool arm_v7m_cpu_exec_interrupt(CPUState *cs, int interrupt_request) } return ret; } -#endif /* CONFIG_TCG */ static void arm926_initfn(Object *obj) { @@ -833,7 +828,6 @@ static void pxa270c5_initfn(Object *obj) cpu->reset_sctlr = 0x00000078; } -#ifdef CONFIG_TCG static struct TCGCPUOps arm_v7m_tcg_ops = { .initialize = arm_translate_init, .synchronize_from_tb = arm_cpu_synchronize_from_tb, @@ -849,7 +843,6 @@ static struct TCGCPUOps arm_v7m_tcg_ops = { .debug_check_watchpoint = arm_debug_check_watchpoint, #endif /* !CONFIG_USER_ONLY */ }; -#endif /* CONFIG_TCG */ static void arm_v7m_class_init(ObjectClass *oc, void *data) { diff --git a/target/arm/meson.build b/target/arm/meson.build index 0ccd2fb0bc..8d0c12b2fc 100644 --- a/target/arm/meson.build +++ b/target/arm/meson.build @@ -18,10 +18,6 @@ arm_ss.add(when: 'TARGET_AARCH64', if_true: files( 'gdbstub64.c', )) -arm_ss.add(when: 'CONFIG_TCG', if_true: files( - 'cpu_tcg.c', -)) - arm_softmmu_ss = ss.source_set() arm_softmmu_ss.add(files( 'arch_dump.c', diff --git a/target/arm/tcg/meson.build b/target/arm/tcg/meson.build index cb67c59416..b3beeef5f2 100644 --- a/target/arm/tcg/meson.build +++ b/target/arm/tcg/meson.build @@ -29,6 +29,7 @@ arm_ss.add(when: 'CONFIG_TCG', if_true: files( 'crypto_helper.c', 'debug_helper.c', 'tcg-cpu.c', + 'tcg-cpu-models.c', ), if_false: files( 'tcg-stubs.c',