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Mon, 19 Apr 2021 08:02:48 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id h14sm27161678wrq.45.2021.04.19.08.02.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 19 Apr 2021 08:02:44 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 2F0241FF9F; Mon, 19 Apr 2021 15:54:37 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v1 16/25] tests/tcg/tricore: Add macros to create tests and first test 'abs' Date: Mon, 19 Apr 2021 15:54:26 +0100 Message-Id: <20210419145435.14083-17-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210419145435.14083-1-alex.bennee@linaro.org> References: <20210419145435.14083-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42d; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, Bastian Koppelmann , f4bug@amsat.org, stefanha@redhat.com, crosa@redhat.com, pbonzini@redhat.com, =?utf-8?q?Alex_?= =?utf-8?q?Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bastian Koppelmann This kind of tests is inspired by the riscv-tests repository. This adds macros that makes it easy to create single instruction self containing tests. It is achieved by macros that create a test sequence for an instruction and check for a supplied correct value. If the value is correct the next instruction is tested. Otherwise we jump to fail handler that writes is test number as a status code back to qemu that then exits on that status code. If all tests pass we write back 0 as a status code and exit. Reviewed-by: Alex Bennée Signed-off-by: Bastian Koppelmann Message-Id: <20210305170045.869437-7-kbastian@mail.uni-paderborn.de> [AJB: add container_hosts] Signed-off-by: Alex Bennée --- tests/tcg/tricore/macros.h | 53 +++++++++++++++++++++++ tests/tcg/configure.sh | 6 +++ tests/tcg/tricore/Makefile.softmmu-target | 2 + tests/tcg/tricore/test_abs.S | 7 +++ 4 files changed, 68 insertions(+) create mode 100644 tests/tcg/tricore/macros.h create mode 100644 tests/tcg/tricore/test_abs.S diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h new file mode 100644 index 0000000000..76c133132a --- /dev/null +++ b/tests/tcg/tricore/macros.h @@ -0,0 +1,53 @@ +/* Helpers */ +#define LI(reg, val) \ + mov.u reg, lo:val; \ + movh DREG_TEMP_LI, up:val; \ + or reg, reg, DREG_TEMP_LI; \ + +/* Address definitions */ +#define TESTDEV_ADDR 0xf0000000 +/* Register definitions */ +#define DREG_RS1 %d0 +#define DREG_CALC_RESULT %d1 +#define DREG_TEMP_LI %d10 +#define DREG_TEMP %d11 +#define DREG_TEST_NUM %d14 +#define DREG_CORRECT_RESULT %d15 + +#define DREG_DEV_ADDR %a15 + +/* Test case wrappers */ +#define TEST_CASE(num, testreg, correct, code...) \ +test_ ## num: \ + code; \ + LI(DREG_CORRECT_RESULT, correct) \ + mov DREG_TEST_NUM, num; \ + jne testreg, DREG_CORRECT_RESULT, fail \ + +/* Actual test case type + * e.g inst %dX, %dY -> TEST_D_D + * inst %dX, %dY, %dZ -> TEST_D_DD + * inst %eX, %dY, %dZ -> TEST_E_DD + */ +#define TEST_D_D(insn, num, result, rs1) \ + TEST_CASE(num, DREG_CALC_RESULT, result, \ + LI(DREG_RS1, rs1); \ + insn DREG_CALC_RESULT, DREG_RS1; \ + ) + +/* Pass/Fail handling part */ +#define TEST_PASSFAIL \ + j pass; \ +fail: \ + LI(DREG_TEMP, TESTDEV_ADDR) \ + mov.a DREG_DEV_ADDR, DREG_TEMP; \ + st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\ + debug; \ + j fail; \ +pass: \ + LI(DREG_TEMP, TESTDEV_ADDR) \ + mov.a DREG_DEV_ADDR, DREG_TEMP; \ + mov DREG_TEST_NUM, 0; \ + st.w [DREG_DEV_ADDR], DREG_TEST_NUM;\ + debug; \ + j pass; diff --git a/tests/tcg/configure.sh b/tests/tcg/configure.sh index 9f304b6c5a..c04d9683ef 100755 --- a/tests/tcg/configure.sh +++ b/tests/tcg/configure.sh @@ -179,6 +179,12 @@ for target in $target_list; do container_image=debian-sparc64-cross container_cross_cc=sparc64-linux-gnu-gcc ;; + tricore-softmmu) + container_hosts=x86_64 + container_image=debian-tricore-cross + container_cross_as=tricore-as + container_cross_ld=tricore-ld + ;; x86_64-*) container_hosts="aarch64 ppc64el x86_64" container_image=debian-amd64-cross diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target index d64a99b95f..3b048e49fa 100644 --- a/tests/tcg/tricore/Makefile.softmmu-target +++ b/tests/tcg/tricore/Makefile.softmmu-target @@ -3,6 +3,8 @@ TESTS_PATH = $(SRC_PATH)/tests/tcg/tricore LDFLAGS = -T$(TESTS_PATH)/link.ld ASFLAGS = +TESTS += test_abs.tst + QEMU_OPTS += -M tricore_testboard -nographic -kernel %.pS: $(TESTS_PATH)/%.S diff --git a/tests/tcg/tricore/test_abs.S b/tests/tcg/tricore/test_abs.S new file mode 100644 index 0000000000..e42240159a --- /dev/null +++ b/tests/tcg/tricore/test_abs.S @@ -0,0 +1,7 @@ +#include "macros.h" +.text +.global _start +_start: + TEST_D_D(abs, 1, 0, 0) + + TEST_PASSFAIL