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[3/5] target/mips: Make check_cp0_enabled() return a boolean

Message ID 20210420193453.1913810-4-f4bug@amsat.org (mailing list archive)
State New
Headers show
Series target/mips: Make check_cp0_enabled() return a boolean | expand

Commit Message

Philippe Mathieu-Daudé April 20, 2021, 7:34 p.m. UTC
To avoid callers to emit dead code if check_cp0_enabled()
raise an exception, let it return a boolean value, whether
CP0 is enabled or not.

Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/translate.h | 7 ++++++-
 target/mips/translate.c | 4 +++-
 2 files changed, 9 insertions(+), 2 deletions(-)

Comments

Richard Henderson April 21, 2021, 1:35 a.m. UTC | #1
On 4/20/21 12:34 PM, Philippe Mathieu-Daudé wrote:
> To avoid callers to emit dead code if check_cp0_enabled()
> raise an exception, let it return a boolean value, whether
> CP0 is enabled or not.
> 
> Suggested-by: Richard Henderson<richard.henderson@linaro.org>
> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org>
> ---
>   target/mips/translate.h | 7 ++++++-
>   target/mips/translate.c | 4 +++-
>   2 files changed, 9 insertions(+), 2 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/target/mips/translate.h b/target/mips/translate.h
index 2b3c7a69ec6..61442590340 100644
--- a/target/mips/translate.h
+++ b/target/mips/translate.h
@@ -120,7 +120,12 @@  void gen_reserved_instruction(DisasContext *ctx);
 
 void check_insn(DisasContext *ctx, uint64_t flags);
 void check_mips_64(DisasContext *ctx);
-void check_cp0_enabled(DisasContext *ctx);
+/**
+ * check_cp0_enabled:
+ * Return %true if CP0 is enabled, otherwise return %false
+ * and emit a 'coprocessor unusable' exception.
+ */
+bool check_cp0_enabled(DisasContext *ctx);
 void check_cp1_enabled(DisasContext *ctx);
 void check_cp1_64bitmode(DisasContext *ctx);
 void check_cp1_registers(DisasContext *ctx, int regs);
diff --git a/target/mips/translate.c b/target/mips/translate.c
index 03fb67f6f22..be5382b41f2 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -1572,11 +1572,13 @@  void gen_move_high32(TCGv ret, TCGv_i64 arg)
 #endif
 }
 
-void check_cp0_enabled(DisasContext *ctx)
+bool check_cp0_enabled(DisasContext *ctx)
 {
     if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) {
         generate_exception_end(ctx, EXCP_CpU);
+        return false;
     }
+    return true;
 }
 
 void check_cp1_enabled(DisasContext *ctx)