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Tue, 04 May 2021 03:09:27 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id 6sm2625772wmg.9.2021.05.04.03.09.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 04 May 2021 03:09:22 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 131EC1FFAC; Tue, 4 May 2021 11:02:26 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v2 23/30] tests/tcg/tricore: Add madd test Date: Tue, 4 May 2021 11:02:16 +0100 Message-Id: <20210504100223.25427-24-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210504100223.25427-1-alex.bennee@linaro.org> References: <20210504100223.25427-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::435; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x435.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, berrange@redhat.com, Bastian Koppelmann , f4bug@amsat.org, stefanha@redhat.com, crosa@redhat.com, pbonzini@redhat.com, =?utf-8?q?Alex_?= =?utf-8?q?Benn=C3=A9e?= , aurelien@aurel32.net Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bastian Koppelmann Tested-by: Alex Bennée Signed-off-by: Bastian Koppelmann Signed-off-by: Alex Bennée Message-Id: <20210305170045.869437-14-kbastian@mail.uni-paderborn.de> --- tests/tcg/tricore/macros.h | 18 ++++++++++++++++++ tests/tcg/tricore/Makefile.softmmu-target | 1 + tests/tcg/tricore/test_madd.S | 11 +++++++++++ 3 files changed, 30 insertions(+) create mode 100644 tests/tcg/tricore/test_madd.S diff --git a/tests/tcg/tricore/macros.h b/tests/tcg/tricore/macros.h index e6a41cd1a2..0d76fc403a 100644 --- a/tests/tcg/tricore/macros.h +++ b/tests/tcg/tricore/macros.h @@ -9,6 +9,7 @@ /* Register definitions */ #define DREG_RS1 %d0 #define DREG_RS2 %d1 +#define DREG_RS3 %d4 #define DREG_CALC_RESULT %d1 #define DREG_CALC_PSW %d2 #define DREG_CORRECT_PSW %d3 @@ -85,6 +86,23 @@ test_ ## num: \ insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2; \ ) +#define TEST_D_DDD_PSW(insn, num, result, psw, rs1, rs2, rs3) \ + TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \ + LI(DREG_RS1, rs1); \ + LI(DREG_RS2, rs2); \ + LI(DREG_RS3, rs3); \ + rstv; \ + insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, DREG_RS3; \ + ) + +#define TEST_D_DDI_PSW(insn, num, result, psw, rs1, rs2, imm) \ + TEST_CASE_PSW(num, DREG_CALC_RESULT, result, psw, \ + LI(DREG_RS1, rs1); \ + LI(DREG_RS2, rs2); \ + rstv; \ + insn DREG_CALC_RESULT, DREG_RS1, DREG_RS2, imm; \ + ) + #define TEST_E_ED(insn, num, res_hi, res_lo, rs1_hi, rs1_lo, rs2) \ TEST_CASE_E(num, res_lo, res_hi, \ LI(EREG_RS1_LO, rs1_lo); \ diff --git a/tests/tcg/tricore/Makefile.softmmu-target b/tests/tcg/tricore/Makefile.softmmu-target index fcc7b6c1c9..8de005523e 100644 --- a/tests/tcg/tricore/Makefile.softmmu-target +++ b/tests/tcg/tricore/Makefile.softmmu-target @@ -10,6 +10,7 @@ TESTS += test_dvstep.tst TESTS += test_fadd.tst TESTS += test_fmul.tst TESTS += test_ftoi.tst +TESTS += test_madd.tst QEMU_OPTS += -M tricore_testboard -nographic -kernel diff --git a/tests/tcg/tricore/test_madd.S b/tests/tcg/tricore/test_madd.S new file mode 100644 index 0000000000..5d839772bb --- /dev/null +++ b/tests/tcg/tricore/test_madd.S @@ -0,0 +1,11 @@ +#include "macros.h" +.text +.global _start +_start: + TEST_D_DDI_PSW(madd, 1, 0x0000fffd, 0x60000b80, 0x0000ffff, 0x7fffffff,2) + TEST_D_DDI_PSW(madd, 2, 0xffff7fff, 0x60000b80, 0xffff8001, 0x7fffffff,2) + TEST_D_DDD_PSW(madds.u, 3, 0xffffffff, 0x60000b80, 0x00000000, 0x80000000, \ + 0x80000000) + + TEST_PASSFAIL +