diff mbox series

[v4,22/31] target/ppc: Implement PNOP

Message ID 20210512185441.3619828-23-matheus.ferst@eldorado.org.br (mailing list archive)
State New, archived
Headers show
Series Base for adding PowerPC 64-bit instructions | expand

Commit Message

Matheus K. Ferst May 12, 2021, 6:54 p.m. UTC 
From: Richard Henderson <richard.henderson@linaro.org>

The illegal suffix behavior matches what was observed in a
POWER10 DD2.0 machine.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>
---
v4:
- Detect illegal suffixes and call gen_invalid.
---
 target/ppc/insn64.decode                   | 66 ++++++++++++++++++++++
 target/ppc/translate/fixedpoint-impl.c.inc |  8 +++
 2 files changed, 74 insertions(+)

Comments

Richard Henderson May 13, 2021, 10:37 a.m. UTC | #1 
On 5/12/21 1:54 PM, matheus.ferst@eldorado.org.br wrote:
> +### Prefixed No-operation Instruction
> +
> +&PNOP           invalid_suffix:bool
> +@PNOP           000001 11 0000-- 000000000000000000     \
> +                ................................        &PNOP
> +
> +{
> +  ## Invalid suffixes: Branch instruction
> +  # bc[l][a]
> +  PNOP            ................................      \
> +                  010000--------------------------      @PNOP invalid_suffix=1

For other cpus it has often turned out to be helpful to have a trans_INVALID or 
UNDEF or RESERVED or suchlike to use for cases like this.  That way you don't 
need a special argument set, nor to set a flag as you do for each of these.

Also, the invalid suffixes themselves do not overlap, so you can get a slightly 
better decode via nested [], like so:

{
   [
     INVALID ...
     INVALID ...
     ...
   ]
   NOP ...
}


r~
diff mbox series

Patch

diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
index 5e6c96a326..56857b5e93 100644
--- a/target/ppc/insn64.decode
+++ b/target/ppc/insn64.decode
@@ -28,3 +28,69 @@ 
 
 PADDI           000001 10 0--.-- ..................     \
                 001110 ..... ..... ................     @PLS_D
+
+### Prefixed No-operation Instruction
+
+&PNOP           invalid_suffix:bool
+@PNOP           000001 11 0000-- 000000000000000000     \
+                ................................        &PNOP
+
+{
+  ## Invalid suffixes: Branch instruction
+  # bc[l][a]
+  PNOP            ................................      \
+                  010000--------------------------      @PNOP invalid_suffix=1
+  # b[l][a]
+  PNOP            ................................      \
+                  010010--------------------------      @PNOP invalid_suffix=1
+  # bclr[l]
+  PNOP            ................................      \
+                  010011---------------0000010000-      @PNOP invalid_suffix=1
+  # bcctr[l]
+  PNOP            ................................      \
+                  010011---------------1000010000-      @PNOP invalid_suffix=1
+  # bctar[l]
+  PNOP            ................................      \
+                  010011---------------1000110000-      @PNOP invalid_suffix=1
+
+  ## Invalid suffixes: rfebb
+  PNOP            ................................      \
+                  010011---------------0010010010-      @PNOP invalid_suffix=1
+
+  ## Invalid suffixes: context synchronizing other than isync
+  # sc
+  PNOP            ................................      \
+                  010001------------------------1-      @PNOP invalid_suffix=1
+  # scv
+  PNOP            ................................      \
+                  010001------------------------01      @PNOP invalid_suffix=1
+  # rfscv
+  PNOP            ................................      \
+                  010011---------------0001010010-      @PNOP invalid_suffix=1
+  # rfid
+  PNOP            ................................      \
+                  010011---------------0000010010-      @PNOP invalid_suffix=1
+  # hrfid
+  PNOP            ................................      \
+                  010011---------------0100010010-      @PNOP invalid_suffix=1
+  # urfid
+  PNOP            ................................      \
+                  010011---------------0100110010-      @PNOP invalid_suffix=1
+  # stop
+  PNOP            ................................      \
+                  010011---------------0101110010-      @PNOP invalid_suffix=1
+  # mtmsr w/ L=0
+  PNOP            ................................      \
+                  011111---------0-----0010010010-      @PNOP invalid_suffix=1
+  # mtmsrd w/ L=0
+  PNOP            ................................      \
+                  011111---------0-----0010110010-      @PNOP invalid_suffix=1
+
+  ## Invalid suffixes: Service Processor Attention
+  PNOP            ................................      \
+                  000000----------------100000000-      @PNOP invalid_suffix=1
+
+  ## Valid suffixes
+  PNOP            ................................      \
+                  --------------------------------      @PNOP invalid_suffix=0
+}
diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
index b7ee0ff034..9a8da29c64 100644
--- a/target/ppc/translate/fixedpoint-impl.c.inc
+++ b/target/ppc/translate/fixedpoint-impl.c.inc
@@ -60,3 +60,11 @@  static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
     a->si <<= 16;
     return trans_ADDI(ctx, a);
 }
+
+static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
+{
+    if (a->invalid_suffix) {
+        gen_invalid(ctx);
+    }
+    return true;
+}