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[83.51.215.31]) by smtp.gmail.com with ESMTPSA id r17sm2644904edt.33.2021.05.13.09.39.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 13 May 2021 09:39:33 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 07/10] hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines Date: Thu, 13 May 2021 18:38:55 +0200 Message-Id: <20210513163858.3928976-8-philmd@redhat.com> X-Mailer: git-send-email 2.26.3 In-Reply-To: <20210513163858.3928976-1-philmd@redhat.com> References: <20210513163858.3928976-1-philmd@redhat.com> MIME-Version: 1.0 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=philmd@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.133.124; envelope-from=philmd@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -34 X-Spam_score: -3.5 X-Spam_bar: --- X-Spam_report: (-3.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.699, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "open list:RISC-V TCG CPUs" , Bin Meng , Alistair Francis , Paolo Bonzini , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Palmer Dabbelt Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Only the Virt and Spike machines use NUMA. Add a RISCV_NUMA Kconfig symbol and only have these machines select it. Adapt the Meson file to only built it if required. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Bin Meng --- hw/riscv/Kconfig | 5 +++++ hw/riscv/meson.build | 2 +- 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index b72a248809e..b22736169c1 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -1,3 +1,6 @@ +config RISCV_NUMA + bool + config IBEX bool @@ -35,6 +38,7 @@ config RISCV_VIRT imply PCI_DEVICES imply VIRTIO_VGA imply TEST_DEVICES + select RISCV_NUMA select GOLDFISH_RTC select MSI_NONBROKEN select PCI @@ -75,6 +79,7 @@ config SIFIVE_U config SPIKE bool + select RISCV_NUMA select HTIF select MSI_NONBROKEN select SIFIVE_CLINT diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index a97454661c0..ab6cae57eae 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -1,6 +1,6 @@ riscv_ss = ss.source_set() riscv_ss.add(files('boot.c'), fdt) -riscv_ss.add(files('numa.c')) +riscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c')) riscv_ss.add(files('riscv_hart.c')) riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c')) riscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c'))