Message ID | 20210515173716.358295-8-philmd@redhat.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | hw: Various Kconfig fixes | expand |
On Sun, May 16, 2021 at 3:47 AM Philippe Mathieu-Daudé <philmd@redhat.com> wrote: > > Only the Virt and Spike machines use NUMA. Add a RISCV_NUMA Kconfig > symbol and only have these machines select it. Adapt the Meson file > to only built it if required. > > Acked-by: Paolo Bonzini <pbonzini@redhat.com> > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> > Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/Kconfig | 5 +++++ > hw/riscv/meson.build | 2 +- > 2 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig > index 86957ec7b06..0590f443fdf 100644 > --- a/hw/riscv/Kconfig > +++ b/hw/riscv/Kconfig > @@ -1,3 +1,6 @@ > +config RISCV_NUMA > + bool > + > config IBEX > bool > > @@ -34,6 +37,7 @@ config RISCV_VIRT > imply PCI_DEVICES > imply VIRTIO_VGA > imply TEST_DEVICES > + select RISCV_NUMA > select GOLDFISH_RTC > select MSI_NONBROKEN > select PCI > @@ -74,6 +78,7 @@ config SIFIVE_U > > config SPIKE > bool > + select RISCV_NUMA > select HTIF > select MSI_NONBROKEN > select SIFIVE_CLINT > diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build > index a97454661c0..ab6cae57eae 100644 > --- a/hw/riscv/meson.build > +++ b/hw/riscv/meson.build > @@ -1,6 +1,6 @@ > riscv_ss = ss.source_set() > riscv_ss.add(files('boot.c'), fdt) > -riscv_ss.add(files('numa.c')) > +riscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c')) > riscv_ss.add(files('riscv_hart.c')) > riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c')) > riscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c')) > -- > 2.26.3 > >
diff --git a/hw/riscv/Kconfig b/hw/riscv/Kconfig index 86957ec7b06..0590f443fdf 100644 --- a/hw/riscv/Kconfig +++ b/hw/riscv/Kconfig @@ -1,3 +1,6 @@ +config RISCV_NUMA + bool + config IBEX bool @@ -34,6 +37,7 @@ config RISCV_VIRT imply PCI_DEVICES imply VIRTIO_VGA imply TEST_DEVICES + select RISCV_NUMA select GOLDFISH_RTC select MSI_NONBROKEN select PCI @@ -74,6 +78,7 @@ config SIFIVE_U config SPIKE bool + select RISCV_NUMA select HTIF select MSI_NONBROKEN select SIFIVE_CLINT diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index a97454661c0..ab6cae57eae 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -1,6 +1,6 @@ riscv_ss = ss.source_set() riscv_ss.add(files('boot.c'), fdt) -riscv_ss.add(files('numa.c')) +riscv_ss.add(when: 'CONFIG_RISCV_NUMA', if_true: files('numa.c')) riscv_ss.add(files('riscv_hart.c')) riscv_ss.add(when: 'CONFIG_OPENTITAN', if_true: files('opentitan.c')) riscv_ss.add(when: 'CONFIG_RISCV_VIRT', if_true: files('virt.c'))