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Fri, 21 May 2021 17:18:19 -0300 (-03) From: "Bruno Larsen (billionai)" To: qemu-devel@nongnu.org Subject: [PATCH v3 2/9] target/ppc: moved ppc_store_lpcr and ppc_store_msr to cpu.c Date: Fri, 21 May 2021 17:17:52 -0300 Message-Id: <20210521201759.85475-3-bruno.larsen@eldorado.org.br> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> References: <20210521201759.85475-1-bruno.larsen@eldorado.org.br> X-OriginalArrivalTime: 21 May 2021 20:18:19.0385 (UTC) FILETIME=[70AB7690:01D74E7E] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=bruno.larsen@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: farosas@linux.ibm.com, richard.henderson@linaro.org, luis.pires@eldorado.org.br, lucas.araujo@eldorado.org.br, fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org, matheus.ferst@eldorado.org.br, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" These functions are used in hw/ppc logic, during machine startup, which means it must be compiled when --disable-tcg is selected, and so it has been moved into a common code file Signed-off-by: Bruno Larsen (billionai) Reviewed-by: Richard Henderson Reviewed-by: David Gibson --- target/ppc/cpu.c | 17 +++++++++++++++++ target/ppc/misc_helper.c | 16 ---------------- 2 files changed, 17 insertions(+), 16 deletions(-) diff --git a/target/ppc/cpu.c b/target/ppc/cpu.c index 9cf3288b7a..c8e87e30f1 100644 --- a/target/ppc/cpu.c +++ b/target/ppc/cpu.c @@ -24,6 +24,7 @@ #include "exec/log.h" #include "fpu/softfloat-helpers.h" #include "mmu-hash64.h" +#include "helper_regs.h" target_ulong cpu_read_xer(CPUPPCState *env) { @@ -92,3 +93,19 @@ void ppc_store_sdr1(CPUPPCState *env, target_ulong value) env->spr[SPR_SDR1] = value; } #endif /* CONFIG_SOFTMMU */ + +/* GDBstub can read and write MSR... */ +void ppc_store_msr(CPUPPCState *env, target_ulong value) +{ + hreg_store_msr(env, value, 0); +} + +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) +{ + PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); + CPUPPCState *env = &cpu->env; + + env->spr[SPR_LPCR] = val & pcc->lpcr_mask; + /* The gtse bit affects hflags */ + hreg_compute_hflags(env); +} diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c index 08a31da289..442b12652c 100644 --- a/target/ppc/misc_helper.c +++ b/target/ppc/misc_helper.c @@ -255,22 +255,6 @@ target_ulong helper_clcs(CPUPPCState *env, uint32_t arg) /*****************************************************************************/ /* Special registers manipulation */ -/* GDBstub can read and write MSR... */ -void ppc_store_msr(CPUPPCState *env, target_ulong value) -{ - hreg_store_msr(env, value, 0); -} - -void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) -{ - PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); - CPUPPCState *env = &cpu->env; - - env->spr[SPR_LPCR] = val & pcc->lpcr_mask; - /* The gtse bit affects hflags */ - hreg_compute_hflags(env); -} - /* * This code is lifted from MacOnLinux. It is called whenever THRM1,2 * or 3 is read an fixes up the values in such a way that will make