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Fri, 04 Jun 2021 09:12:50 -0700 (PDT) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id l9sm5987730wme.21.2021.06.04.09.12.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 04 Jun 2021 09:12:43 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 0518A20015; Fri, 4 Jun 2021 16:53:24 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v16 92/99] target/arm: remove v7m stub function for !CONFIG_TCG Date: Fri, 4 Jun 2021 16:53:05 +0100 Message-Id: <20210604155312.15902-93-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210604155312.15902-1-alex.bennee@linaro.org> References: <20210604155312.15902-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42b; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42b.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Claudio Fontana Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Claudio Fontana it is needed just once, so just move the CONFIG_TCG check in place. Signed-off-by: Claudio Fontana Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- target/arm/cpu-mmu.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/target/arm/cpu-mmu.c b/target/arm/cpu-mmu.c index c6ac90a61e..e1bebbf73e 100644 --- a/target/arm/cpu-mmu.c +++ b/target/arm/cpu-mmu.c @@ -19,6 +19,7 @@ */ #include "qemu/osdep.h" +#include "sysemu/tcg.h" #include "cpu-mmu.h" int aa64_va_parameter_tbi(uint64_t tcr, ARMMMUIdx mmu_idx) @@ -155,20 +156,15 @@ int arm_mmu_idx_to_el(ARMMMUIdx mmu_idx) } } -#ifndef CONFIG_TCG -ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate) -{ - g_assert_not_reached(); -} -#endif - ARMMMUIdx arm_mmu_idx_el(CPUARMState *env, int el) { ARMMMUIdx idx; uint64_t hcr; - if (arm_feature(env, ARM_FEATURE_M)) { - return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure); + if (tcg_enabled()) { + if (arm_feature(env, ARM_FEATURE_M)) { + return arm_v7m_mmu_idx_for_secstate(env, env->v7m.secure); + } } /* See ARM pseudo-function ELIsInHost. */