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07 Jun 2021 17:10:28 -0700 IronPort-SDR: ukSmyZ9A7OfLZzeMBvxPN0KfqnGjuIZsllV5O2bDoE7KcDf8MmkA4j1MVq/A7aiUIclQ4hRtAD 2BywmoO7AsOvxGM7XVhCWvNvSqQK/v3d5RcUjJadn7gVG3K001fLbyemy5eAeIiHuQCx1zCKrk PlQKU+I4Cx+PRH6Mq6qqdgH5scIeKcRKkll6WLHcSEMC39lSGREoqc3t+fyYiBzxkgSrkCsn83 8fteCNvkVCen6jYEi8gBU33gqhs0lYezwcTmhLctRvyx1fNHXH0Z5lKIrNPfn/qz3cmxBOe9JB ZFw= WDCIronportException: Internal Received: from unknown (HELO localhost.localdomain) ([10.225.165.82]) by uls-op-cesaip02.wdc.com with ESMTP; 07 Jun 2021 17:31:18 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 21/32] target/riscv: rvb: min/max instructions Date: Tue, 8 Jun 2021 10:29:36 +1000 Message-Id: <20210608002947.1649775-22-alistair.francis@wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210608002947.1649775-1-alistair.francis@wdc.com> References: <20210608002947.1649775-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=7863c9c60=alistair.francis@wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Frank Chang , alistair23@gmail.com, Kito Cheng , Richard Henderson , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Kito Cheng Signed-off-by: Kito Cheng Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis Signed-off-by: Frank Chang Message-id: 20210505160620.15723-7-frank.chang@sifive.com Signed-off-by: Alistair Francis --- target/riscv/insn32.decode | 4 ++++ target/riscv/insn_trans/trans_rvb.c.inc | 24 ++++++++++++++++++++++++ 2 files changed, 28 insertions(+) diff --git a/target/riscv/insn32.decode b/target/riscv/insn32.decode index 9b2fd4b6fe..81dfdfbafd 100644 --- a/target/riscv/insn32.decode +++ b/target/riscv/insn32.decode @@ -669,6 +669,10 @@ xnor 0100000 .......... 100 ..... 0110011 @r pack 0000100 .......... 100 ..... 0110011 @r packu 0100100 .......... 100 ..... 0110011 @r packh 0000100 .......... 111 ..... 0110011 @r +min 0000101 .......... 100 ..... 0110011 @r +minu 0000101 .......... 101 ..... 0110011 @r +max 0000101 .......... 110 ..... 0110011 @r +maxu 0000101 .......... 111 ..... 0110011 @r # *** RV64B Standard Extension (in addition to RV32B) *** clzw 0110000 00000 ..... 001 ..... 0011011 @r2 diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index 770205f96f..5a4fc02f70 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -71,6 +71,30 @@ static bool trans_packh(DisasContext *ctx, arg_packh *a) return gen_arith(ctx, a, gen_packh); } +static bool trans_min(DisasContext *ctx, arg_min *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, tcg_gen_smin_tl); +} + +static bool trans_max(DisasContext *ctx, arg_max *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, tcg_gen_smax_tl); +} + +static bool trans_minu(DisasContext *ctx, arg_minu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, tcg_gen_umin_tl); +} + +static bool trans_maxu(DisasContext *ctx, arg_maxu *a) +{ + REQUIRE_EXT(ctx, RVB); + return gen_arith(ctx, a, tcg_gen_umax_tl); +} + static bool trans_clzw(DisasContext *ctx, arg_clzw *a) { REQUIRE_64BIT(ctx);