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07 Jun 2021 17:09:38 -0700 IronPort-SDR: F3SXequd4K4sAb/OYMlPZ7TMOVy9++Ko4Mlw+NkphqxIqyE0CUW137qbbzxlI5G3hKgYg9dTx7 P2f9JOJSxn2Z2k+crwAjxUcrieNSHkgig/U80yzuR5Vggbvn+Wo3OSXQHLLguiIF86LQ+pDqxN of0vd5J3FV4tr5JVJeB6pV6kw/6JjLdXXbkDByp+2lZitNM/tuZHPUMz+gZ4xOleSC3/tzqmtB M5ZRx6ZGHcfZM9A2p1YA2vjO/FScC0H3U7lrbWz8OVy/ga52I4bVYQZdk92Yws3h4NQfBqUbQU 8iI= WDCIronportException: Internal Received: from unknown (HELO localhost.localdomain) ([10.225.165.82]) by uls-op-cesaip02.wdc.com with ESMTP; 07 Jun 2021 17:30:29 -0700 From: Alistair Francis To: qemu-devel@nongnu.org, peter.maydell@linaro.org Subject: [PULL 07/32] hw/riscv: Use macros for BIOS image names Date: Tue, 8 Jun 2021 10:29:22 +1000 Message-Id: <20210608002947.1649775-8-alistair.francis@wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210608002947.1649775-1-alistair.francis@wdc.com> References: <20210608002947.1649775-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=216.71.153.144; envelope-from=prvs=7863c9c60=alistair.francis@wdc.com; helo=esa5.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: alistair23@gmail.com, Bin Meng , Alistair Francis Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Bin Meng The OpenSBI BIOS image names are used by many RISC-V machines. Let's define macros for them. Signed-off-by: Bin Meng Reviewed-by: Alistair Francis Message-id: 20210430071302.1489082-7-bmeng.cn@gmail.com Signed-off-by: Alistair Francis --- include/hw/riscv/boot.h | 5 +++++ hw/riscv/sifive_u.c | 6 ++---- hw/riscv/spike.c | 6 ++---- hw/riscv/virt.c | 6 ++---- 4 files changed, 11 insertions(+), 12 deletions(-) diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 11a21dd584..0e89400b09 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -24,6 +24,11 @@ #include "hw/loader.h" #include "hw/riscv/riscv_hart.h" +#define RISCV32_BIOS_BIN "opensbi-riscv32-generic-fw_dynamic.bin" +#define RISCV32_BIOS_ELF "opensbi-riscv32-generic-fw_dynamic.elf" +#define RISCV64_BIOS_BIN "opensbi-riscv64-generic-fw_dynamic.bin" +#define RISCV64_BIOS_ELF "opensbi-riscv64-generic-fw_dynamic.elf" + bool riscv_is_32bit(RISCVHartArrayState *harts); target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts, diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index a32a95d58f..273c86418c 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -560,12 +560,10 @@ static void sifive_u_machine_init(MachineState *machine) if (riscv_is_32bit(&s->soc.u_cpus)) { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv32-generic-fw_dynamic.bin", - start_addr, NULL); + RISCV32_BIOS_BIN, start_addr, NULL); } else { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv64-generic-fw_dynamic.bin", - start_addr, NULL); + RISCV64_BIOS_BIN, start_addr, NULL); } if (machine->kernel_filename) { diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index 4b08816dfa..fead77f0c4 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -258,13 +258,11 @@ static void spike_board_init(MachineState *machine) */ if (riscv_is_32bit(&s->soc[0])) { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv32-generic-fw_dynamic.elf", - memmap[SPIKE_DRAM].base, + RISCV32_BIOS_ELF, memmap[SPIKE_DRAM].base, htif_symbol_callback); } else { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv64-generic-fw_dynamic.elf", - memmap[SPIKE_DRAM].base, + RISCV64_BIOS_ELF, memmap[SPIKE_DRAM].base, htif_symbol_callback); } diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index 560216d217..4a3cd2599a 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -681,12 +681,10 @@ static void virt_machine_init(MachineState *machine) if (riscv_is_32bit(&s->soc[0])) { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv32-generic-fw_dynamic.bin", - start_addr, NULL); + RISCV32_BIOS_BIN, start_addr, NULL); } else { firmware_end_addr = riscv_find_and_load_firmware(machine, - "opensbi-riscv64-generic-fw_dynamic.bin", - start_addr, NULL); + RISCV64_BIOS_BIN, start_addr, NULL); } if (machine->kernel_filename) {