From patchwork Thu Jun 24 10:50:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: LIU Zhiwei X-Patchwork-Id: 12341893 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9F399C48BDF for ; Thu, 24 Jun 2021 11:19:58 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 6A04F613B3 for ; Thu, 24 Jun 2021 11:19:58 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 6A04F613B3 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=c-sky.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39542 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lwNOn-0005xa-Ct for qemu-devel@archiver.kernel.org; Thu, 24 Jun 2021 07:19:57 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:40444) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lwMxT-0004rh-Oy for qemu-devel@nongnu.org; Thu, 24 Jun 2021 06:51:45 -0400 Received: from out28-123.mail.aliyun.com ([115.124.28.123]:53332) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lwMxP-0007zC-QP for qemu-devel@nongnu.org; Thu, 24 Jun 2021 06:51:43 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.4299956|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0420961-0.000484722-0.957419; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047190; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=3; RT=3; SR=0; TI=SMTPD_---.KXKBQkc_1624531893; Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.KXKBQkc_1624531893) by smtp.aliyun-inc.com(10.147.40.200); Thu, 24 Jun 2021 18:51:34 +0800 From: LIU Zhiwei To: qemu-devel@nongnu.org Subject: [PATCH 5/5] tcg: Implement tcg_gen_vec_add{sub}32_tl Date: Thu, 24 Jun 2021 18:50:23 +0800 Message-Id: <20210624105023.3852-6-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210624105023.3852-1-zhiwei_liu@c-sky.com> References: <20210624105023.3852-1-zhiwei_liu@c-sky.com> Received-SPF: none client-ip=115.124.28.123; envelope-from=zhiwei_liu@c-sky.com; helo=out28-123.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, LIU Zhiwei Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: LIU Zhiwei --- include/tcg/tcg-op-gvec.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/tcg/tcg-op-gvec.h b/include/tcg/tcg-op-gvec.h index e3b274502c..da55fed870 100644 --- a/include/tcg/tcg-op-gvec.h +++ b/include/tcg/tcg-op-gvec.h @@ -420,6 +420,8 @@ void tcg_gen_vec_sar16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); #define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i64 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i64 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i64 +#define tcg_gen_vec_add32_tl tcg_gen_vec_add32_i64 +#define tcg_gen_vec_sub32_tl tcg_gen_vec_sub32_i64 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i64 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i64 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i64 @@ -432,6 +434,8 @@ void tcg_gen_vec_sar16i_i32(TCGv_i32 d, TCGv_i32 a, int32_t); #define tcg_gen_vec_sub8_tl tcg_gen_vec_sub8_i32 #define tcg_gen_vec_add16_tl tcg_gen_vec_add16_i32 #define tcg_gen_vec_sub16_tl tcg_gen_vec_sub16_i32 +#define tcg_gen_vec_add32_tl tcg_gen_add_i32 +#define tcg_gen_vec_sub32_tl tcg_gen_sub_i32 #define tcg_gen_vec_shl8i_tl tcg_gen_vec_shl8i_i32 #define tcg_gen_vec_shr8i_tl tcg_gen_vec_shr8i_i32 #define tcg_gen_vec_sar8i_tl tcg_gen_vec_sar8i_i32