diff mbox series

[PULL,11/15] target/mips: fix emulation of nanoMIPS BPOSGE32 instruction

Message ID 20210625092329.1529100-12-f4bug@amsat.org (mailing list archive)
State New, archived
Headers show
Series [PULL,01/15] target/mips: Fix potential integer overflow (CID 1452921) | expand

Commit Message

Philippe Mathieu-Daudé June 25, 2021, 9:23 a.m. UTC 
From: Aleksandar Rikalo <Aleksandar.Rikalo@syrmia.com>

Per the "MIPS® Architecture Extension: nanoMIPS32 DSP Technical
Reference Manual — Revision 0.04" p. 88 "BPOSGE32C", offset argument (imm)
should be left-shifted first.
This change was tested against test_dsp_r1_bposge32.c DSP test.

Reported-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Signed-off-by: Filip Vidojevic <filip.vidojevic@syrmia.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <VI1PR0302MB34869449EE56F226FC3C21129C309@VI1PR0302MB3486.eurprd03.prod.outlook.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
 target/mips/tcg/translate.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c
index 1ff0b098bca..d248b5e5d21 100644
--- a/target/mips/tcg/translate.c
+++ b/target/mips/tcg/translate.c
@@ -21137,7 +21137,7 @@  static int decode_nanomips_32_48_opc(CPUMIPSState *env, DisasContext *ctx)
                                       extract32(ctx->opcode, 0, 1) << 13;
 
                         gen_compute_branch_nm(ctx, OPC_BPOSGE32, 4, -1, -2,
-                                              imm);
+                                              imm << 1);
                     }
                     break;
                 default: