diff mbox series

[v3,12/29] tcg/ppc: Use power10 byte-reverse instructions

Message ID 20210626063631.2411938-13-richard.henderson@linaro.org (mailing list archive)
State New, archived
Headers show
Series tcg: bswap improvements | expand

Commit Message

Richard Henderson June 26, 2021, 6:36 a.m. UTC
Cc: qemu-ppc@nongnu.org
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/ppc/tcg-target.c.inc | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

Comments

Peter Maydell June 28, 2021, 2:33 p.m. UTC | #1
On Sat, 26 Jun 2021 at 07:41, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> Cc: qemu-ppc@nongnu.org
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>  tcg/ppc/tcg-target.c.inc | 34 ++++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

> +    if (have_isa_3_10) {

Side note, why do we call this have_isa_3_10 when it's checking
for ISA 3.1, not 3.10 ? The kernel calls its feature bit
#define PPC_FEATURE2_ARCH_3_1          0x00040000 /* ISA 3.1 */

but we seem to have gone for
#define PPC_FEATURE2_ARCH_3_10          0x00040000
in our elf.h.

thanks
-- PMM
Richard Henderson June 28, 2021, 2:45 p.m. UTC | #2
On 6/28/21 7:33 AM, Peter Maydell wrote:
>> +    if (have_isa_3_10) {
> 
> Side note, why do we call this have_isa_3_10 when it's checking
> for ISA 3.1, not 3.10 ?

I think it's just because it made the columns line up:

#define have_isa_2_06  (have_isa >= tcg_isa_2_06)
#define have_isa_2_07  (have_isa >= tcg_isa_2_07)
#define have_isa_3_00  (have_isa >= tcg_isa_3_00)
#define have_isa_3_10  (have_isa >= tcg_isa_3_10)

though I think there's also a missing . or _ there -- should have been 2.0.6 and 2.0.7.


r~
Bruno Larsen (billionai) June 28, 2021, 4:22 p.m. UTC | #3
On 28/06/2021 11:45, Richard Henderson wrote:
> On 6/28/21 7:33 AM, Peter Maydell wrote:
>>> +    if (have_isa_3_10) {
>>
>> Side note, why do we call this have_isa_3_10 when it's checking
>> for ISA 3.1, not 3.10 ?
>
> I think it's just because it made the columns line up:
>
> #define have_isa_2_06  (have_isa >= tcg_isa_2_06)
> #define have_isa_2_07  (have_isa >= tcg_isa_2_07)
> #define have_isa_3_00  (have_isa >= tcg_isa_3_00)
> #define have_isa_3_10  (have_isa >= tcg_isa_3_10)
>
> though I think there's also a missing . or _ there -- should have been 
> 2.0.6 and 2.0.7.

No. The specifications in the Open Power foundation's websites call the 
versions

2.07: 
https://openpowerfoundation.org/?resource_lib=ibm-power-isa-version-2-07-b

and 2.06: http://kib.kiev.ua/x86docs/POWER/PowerISA_V2.06B_V2_PUBLIC.pdf


Unless the PDFs also lost a . somewhere, which isn't impossible, but I 
find more unlikely.

>
>
> r~
>
diff mbox series

Patch

diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 33f0139519..e0f4665213 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -413,6 +413,10 @@  static bool tcg_target_const_match(int64_t val, TCGType type, int ct)
 #define SRAD   XO31(794)
 #define SRADI  XO31(413<<1)
 
+#define BRH    XO31(219)
+#define BRW    XO31(155)
+#define BRD    XO31(187)
+
 #define TW     XO31( 4)
 #define TRAP   (TW | TO(31))
 
@@ -748,6 +752,11 @@  static inline void tcg_out_ext16s(TCGContext *s, TCGReg dst, TCGReg src)
     tcg_out32(s, EXTSH | RA(dst) | RS(src));
 }
 
+static inline void tcg_out_ext16u(TCGContext *s, TCGReg dst, TCGReg src)
+{
+    tcg_out32(s, ANDI | SAI(src, dst, 0xffff));
+}
+
 static inline void tcg_out_ext32s(TCGContext *s, TCGReg dst, TCGReg src)
 {
     tcg_out32(s, EXTSW | RA(dst) | RS(src));
@@ -793,6 +802,16 @@  static void tcg_out_bswap16(TCGContext *s, TCGReg dst, TCGReg src, int flags)
 {
     TCGReg tmp = dst == src ? TCG_REG_R0 : dst;
 
+    if (have_isa_3_10) {
+        tcg_out32(s, BRH | RA(dst) | RS(src));
+        if (flags & TCG_BSWAP_OS) {
+            tcg_out_ext16s(s, dst, dst);
+        } else if ((flags & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+            tcg_out_ext16u(s, dst, dst);
+        }
+        return;
+    }
+
     /*
      * In the following,
      *   dep(a, b, m) -> (a & ~m) | (b & m)
@@ -815,6 +834,16 @@  static void tcg_out_bswap32(TCGContext *s, TCGReg dst, TCGReg src, int flags)
 {
     TCGReg tmp = dst == src ? TCG_REG_R0 : dst;
 
+    if (have_isa_3_10) {
+        tcg_out32(s, BRW | RA(dst) | RS(src));
+        if (flags & TCG_BSWAP_OS) {
+            tcg_out_ext32s(s, dst, dst);
+        } else if ((flags & (TCG_BSWAP_IZ | TCG_BSWAP_OZ)) == TCG_BSWAP_OZ) {
+            tcg_out_ext32u(s, dst, dst);
+        }
+        return;
+    }
+
     /*
      * Stolen from gcc's builtin_bswap32.
      * In the following,
@@ -841,6 +870,11 @@  static void tcg_out_bswap64(TCGContext *s, TCGReg dst, TCGReg src)
     TCGReg t0 = dst == src ? TCG_REG_R0 : dst;
     TCGReg t1 = dst == src ? dst : TCG_REG_R0;
 
+    if (have_isa_3_10) {
+        tcg_out32(s, BRD | RA(dst) | RS(src));
+        return;
+    }
+
     /*
      * In the following,
      *   dep(a, b, m) -> (a & ~m) | (b & m)