diff mbox series

[v2,4/8] virtio-gpu: Shared memory capability

Message ID 20210728134634.2142156-5-antonio.caggiano@collabora.com (mailing list archive)
State New, archived
Headers show
Series virtio-gpu: Support Venus Vulkan driver | expand

Commit Message

Antonio Caggiano July 28, 2021, 1:46 p.m. UTC 
Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu. Also, remove
struct virtio_pci_shm_cap as virtio_pci_cap64 can be used instead.

Signed-off-by: Antonio Caggiano <antonio.caggiano@collabora.com>
---
 hw/display/virtio-gpu-pci.c                 | 2 +-
 hw/display/virtio-vga.c                     | 2 +-
 hw/virtio/virtio-pci.c                      | 4 ++--
 include/standard-headers/linux/virtio_pci.h | 7 -------
 4 files changed, 4 insertions(+), 11 deletions(-)

Comments

Gerd Hoffmann July 30, 2021, 9:52 a.m. UTC | #1 
> -        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, 0);
> +        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);

Squash that into patch #2

> --- a/include/standard-headers/linux/virtio_pci.h
> +++ b/include/standard-headers/linux/virtio_pci.h
> @@ -172,13 +172,6 @@ struct virtio_pci_cfg_cap {
>  	uint8_t pci_cfg_data[4]; /* Data for BAR access. */
>  };
>  
> -struct virtio_pci_shm_cap {
> -	struct virtio_pci_cap cap;
> -	uint32_t offset_hi;             /* Most sig 32 bits of offset */
> -	uint32_t length_hi;             /* Most sig 32 bits of length */
> -	uint8_t  id;                    /* To distinguish shm chunks */
> -};
> -

Hmm?  I doubt this is correct ...

take care,
  Gerd
diff mbox series

Patch

diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c
index 9808663d05..a79bd751b2 100644
--- a/hw/display/virtio-gpu-pci.c
+++ b/hw/display/virtio-gpu-pci.c
@@ -43,7 +43,7 @@  static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
                          PCI_BASE_ADDRESS_MEM_PREFETCH |
                          PCI_BASE_ADDRESS_MEM_TYPE_64,
                          &g->hostmem);
-        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, 0);
+        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
     }
 
     qdev_set_parent_bus(vdev, BUS(&vpci_dev->bus), errp);
diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c
index 61993dd3f2..ca841a0799 100644
--- a/hw/display/virtio-vga.c
+++ b/hw/display/virtio-vga.c
@@ -147,7 +147,7 @@  static void virtio_vga_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
                          PCI_BASE_ADDRESS_MEM_PREFETCH |
                          PCI_BASE_ADDRESS_MEM_TYPE_64,
                          &g->hostmem);
-        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, 0);
+        virtio_pci_add_shm_cap(vpci_dev, 4, 0, g->conf.hostmem, VIRTIO_GPU_SHM_ID_HOST_VISIBLE);
     }
 
     if (!(vpci_dev->flags & VIRTIO_PCI_FLAG_PAGE_PER_VQ)) {
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index 3589386412..37a50b4658 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -1153,7 +1153,7 @@  int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
                            uint8_t bar, uint64_t offset, uint64_t length,
                            uint8_t id)
 {
-    struct virtio_pci_shm_cap cap = {
+    struct virtio_pci_cap64 cap = {
         .cap.cap_len = sizeof cap,
         .cap.cfg_type = VIRTIO_PCI_CAP_SHARED_MEMORY_CFG,
     };
@@ -1164,7 +1164,7 @@  int virtio_pci_add_shm_cap(VirtIOPCIProxy *proxy,
     cap.length_hi = cpu_to_le32((length >> 32) & mask32);
     cap.cap.offset = cpu_to_le32(offset & mask32);
     cap.offset_hi = cpu_to_le32((offset >> 32) & mask32);
-    cap.id = id;
+    cap.cap.id = id;
     return virtio_pci_add_mem_cap(proxy, &cap.cap);
 }
 
diff --git a/include/standard-headers/linux/virtio_pci.h b/include/standard-headers/linux/virtio_pci.h
index 85d1420d29..db7a8e2fcb 100644
--- a/include/standard-headers/linux/virtio_pci.h
+++ b/include/standard-headers/linux/virtio_pci.h
@@ -172,13 +172,6 @@  struct virtio_pci_cfg_cap {
 	uint8_t pci_cfg_data[4]; /* Data for BAR access. */
 };
 
-struct virtio_pci_shm_cap {
-	struct virtio_pci_cap cap;
-	uint32_t offset_hi;             /* Most sig 32 bits of offset */
-	uint32_t length_hi;             /* Most sig 32 bits of length */
-	uint8_t  id;                    /* To distinguish shm chunks */
-};
-
 /* Macro versions of offsets for the Old Timers! */
 #define VIRTIO_PCI_CAP_VNDR		0
 #define VIRTIO_PCI_CAP_NEXT		1