diff mbox series

[RFC,06/13] target/riscv: Fix div instructions

Message ID 20210805025312.15720-7-zhiwei_liu@c-sky.com (mailing list archive)
State New, archived
Headers show
Series Support UXL field in mstatus | expand

Commit Message

LIU Zhiwei Aug. 5, 2021, 2:53 a.m. UTC 
Don't overwrite global source register after
https://lists.gnu.org/archive/html/qemu-riscv/2021-07/msg00058.html.

Signed-off-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
---
 target/riscv/translate.c | 46 +++++++++++++++++++++++-----------------
 1 file changed, 26 insertions(+), 20 deletions(-)

Comments

Richard Henderson Aug. 5, 2021, 10:18 p.m. UTC | #1 
On 8/4/21 4:53 PM, LIU Zhiwei wrote:
> Don't overwrite global source register after
> https://lists.gnu.org/archive/html/qemu-riscv/2021-07/msg00058.html.
> 
> Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
> ---
>   target/riscv/translate.c | 46 +++++++++++++++++++++++-----------------
>   1 file changed, 26 insertions(+), 20 deletions(-)

FWIW, I have a cleanup to these routines that does more than add temps.  I've been slow to 
re-post the series; sorry about that.


r~
LIU Zhiwei Aug. 9, 2021, 7:53 a.m. UTC | #2 
On 2021/8/6 上午6:18, Richard Henderson wrote:
> On 8/4/21 4:53 PM, LIU Zhiwei wrote:
>> Don't overwrite global source register after
>> https://lists.gnu.org/archive/html/qemu-riscv/2021-07/msg00058.html.
>>
>> Signed-off-by: LIU Zhiwei<zhiwei_liu@c-sky.com>
>> ---
>>   target/riscv/translate.c | 46 +++++++++++++++++++++++-----------------
>>   1 file changed, 26 insertions(+), 20 deletions(-)
>
> FWIW, I have a cleanup to these routines that does more than add 
> temps.  I've been slow to re-post the series; sorry about that.
>
Look forward to your next patch set. I will send my next patch set based 
on your new post.

Thanks,
Zhiwei

> r~
diff mbox series

Patch

diff --git a/target/riscv/translate.c b/target/riscv/translate.c
index 912e5f1061..2892eaa9a7 100644
--- a/target/riscv/translate.c
+++ b/target/riscv/translate.c
@@ -265,7 +265,7 @@  static void gen_mulhsu(TCGv ret, TCGv arg1, TCGv arg2)
 
 static void gen_div(TCGv ret, TCGv source1, TCGv source2)
 {
-    TCGv cond1, cond2, zeroreg, resultopt1;
+    TCGv cond1, cond2, zeroreg, resultopt1, t1, t2;
     /*
      * Handle by altering args to tcg_gen_div to produce req'd results:
      * For overflow: want source1 in source1 and 1 in source2
@@ -275,6 +275,8 @@  static void gen_div(TCGv ret, TCGv source1, TCGv source2)
     cond2 = tcg_temp_new();
     zeroreg = tcg_constant_tl(0);
     resultopt1 = tcg_temp_new();
+    t1 = tcg_temp_new();
+    t2 = tcg_temp_new();
 
     tcg_gen_movi_tl(resultopt1, (target_ulong)-1);
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)(~0L));
@@ -283,49 +285,52 @@  static void gen_div(TCGv ret, TCGv source1, TCGv source2)
     tcg_gen_and_tl(cond1, cond1, cond2); /* cond1 = overflow */
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, 0); /* cond2 = div 0 */
     /* if div by zero, set source1 to -1, otherwise don't change */
-    tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond2, zeroreg, source1,
-            resultopt1);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t1, cond2, zeroreg, source1, resultopt1);
     /* if overflow or div by zero, set source2 to 1, else don't change */
     tcg_gen_or_tl(cond1, cond1, cond2);
     tcg_gen_movi_tl(resultopt1, (target_ulong)1);
-    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
-            resultopt1);
-    tcg_gen_div_tl(ret, source1, source2);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t2, cond1, zeroreg, source2, resultopt1);
+    tcg_gen_div_tl(ret, t1, t2);
 
     tcg_temp_free(cond1);
     tcg_temp_free(cond2);
     tcg_temp_free(resultopt1);
+    tcg_temp_free(t1);
+    tcg_temp_free(t2);
 }
 
 static void gen_divu(TCGv ret, TCGv source1, TCGv source2)
 {
-    TCGv cond1, zeroreg, resultopt1;
+    TCGv cond1, zeroreg, resultopt1, t1, t2;
     cond1 = tcg_temp_new();
 
     zeroreg = tcg_constant_tl(0);
     resultopt1 = tcg_temp_new();
+    t1 = tcg_temp_new();
+    t2 = tcg_temp_new();
 
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0);
     tcg_gen_movi_tl(resultopt1, (target_ulong)-1);
-    tcg_gen_movcond_tl(TCG_COND_EQ, source1, cond1, zeroreg, source1,
-            resultopt1);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t1, cond1, zeroreg, source1, resultopt1);
     tcg_gen_movi_tl(resultopt1, (target_ulong)1);
-    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
-            resultopt1);
-    tcg_gen_divu_tl(ret, source1, source2);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t2, cond1, zeroreg, source2, resultopt1);
+    tcg_gen_divu_tl(ret, t1, t2);
 
     tcg_temp_free(cond1);
     tcg_temp_free(resultopt1);
+    tcg_temp_free(t1);
+    tcg_temp_free(t2);
 }
 
 static void gen_rem(TCGv ret, TCGv source1, TCGv source2)
 {
-    TCGv cond1, cond2, zeroreg, resultopt1;
+    TCGv cond1, cond2, zeroreg, resultopt1, t2;
 
     cond1 = tcg_temp_new();
     cond2 = tcg_temp_new();
     zeroreg = tcg_constant_tl(0);
     resultopt1 = tcg_temp_new();
+    t2 = tcg_temp_new();
 
     tcg_gen_movi_tl(resultopt1, 1L);
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond2, source2, (target_ulong)-1);
@@ -335,9 +340,8 @@  static void gen_rem(TCGv ret, TCGv source1, TCGv source2)
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0); /* cond2 = div 0 */
     /* if overflow or div by zero, set source2 to 1, else don't change */
     tcg_gen_or_tl(cond2, cond1, cond2);
-    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond2, zeroreg, source2,
-            resultopt1);
-    tcg_gen_rem_tl(resultopt1, source1, source2);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t2, cond2, zeroreg, source2, resultopt1);
+    tcg_gen_rem_tl(resultopt1, source1, t2);
     /* if div by zero, just return the original dividend */
     tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1,
             source1);
@@ -345,26 +349,28 @@  static void gen_rem(TCGv ret, TCGv source1, TCGv source2)
     tcg_temp_free(cond1);
     tcg_temp_free(cond2);
     tcg_temp_free(resultopt1);
+    tcg_temp_free(t2);
 }
 
 static void gen_remu(TCGv ret, TCGv source1, TCGv source2)
 {
-    TCGv cond1, zeroreg, resultopt1;
+    TCGv cond1, zeroreg, resultopt1, t2;
     cond1 = tcg_temp_new();
     zeroreg = tcg_constant_tl(0);
     resultopt1 = tcg_temp_new();
+    t2 = tcg_temp_new();
 
     tcg_gen_movi_tl(resultopt1, (target_ulong)1);
     tcg_gen_setcondi_tl(TCG_COND_EQ, cond1, source2, 0);
-    tcg_gen_movcond_tl(TCG_COND_EQ, source2, cond1, zeroreg, source2,
-            resultopt1);
-    tcg_gen_remu_tl(resultopt1, source1, source2);
+    tcg_gen_movcond_tl(TCG_COND_EQ, t2, cond1, zeroreg, source2, resultopt1);
+    tcg_gen_remu_tl(resultopt1, source1, t2);
     /* if div by zero, just return the original dividend */
     tcg_gen_movcond_tl(TCG_COND_EQ, ret, cond1, zeroreg, resultopt1,
             source1);
 
     tcg_temp_free(cond1);
     tcg_temp_free(resultopt1);
+    tcg_temp_free(t2);
 }
 
 static void gen_jal(DisasContext *ctx, int rd, target_ulong imm)