diff mbox series

[02/26] ppc/pnv: Change the POWER10 machine to support DD2 only

Message ID 20210809134547.689560-3-clg@kaod.org (mailing list archive)
State New, archived
Headers show
Series ppc/pnv: Extend the powernv10 machine | expand

Commit Message

Cédric Le Goater Aug. 9, 2021, 1:45 p.m. UTC
There is no need to keep the DD1 chip model as it will never be
publicly available.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 include/hw/ppc/pnv.h | 2 +-
 hw/ppc/pnv.c         | 2 +-
 hw/ppc/pnv_core.c    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

Comments

Greg Kurz Aug. 20, 2021, 1:41 p.m. UTC | #1
On Mon, 9 Aug 2021 15:45:23 +0200
Cédric Le Goater <clg@kaod.org> wrote:

> There is no need to keep the DD1 chip model as it will never be
> publicly available.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---

Reviewed-by: Greg Kurz <groug@kaod.org>

>  include/hw/ppc/pnv.h | 2 +-
>  hw/ppc/pnv.c         | 2 +-
>  hw/ppc/pnv_core.c    | 2 +-
>  3 files changed, 3 insertions(+), 3 deletions(-)
> 
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index d69cee17b232..3fec7c87d82d 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -170,7 +170,7 @@ DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL,
>  DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9,
>                           TYPE_PNV_CHIP_POWER9)
>  
> -#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0")
> +#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v2.0")
>  DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
>                           TYPE_PNV_CHIP_POWER10)
>  
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index d16dd2d0801d..b122251d1a5d 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1916,7 +1916,7 @@ static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
>      static const char compat[] = "qemu,powernv10\0ibm,powernv";
>  
>      mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
> -    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v1.0");
> +    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
>  
>      pmc->compat = compat;
>      pmc->compat_size = sizeof(compat);
> diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
> index 8c2a15a0fb2f..4de8414df212 100644
> --- a/hw/ppc/pnv_core.c
> +++ b/hw/ppc/pnv_core.c
> @@ -347,7 +347,7 @@ static const TypeInfo pnv_core_infos[] = {
>      DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"),
>      DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"),
>      DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"),
> -    DEFINE_PNV_CORE_TYPE(power10, "power10_v1.0"),
> +    DEFINE_PNV_CORE_TYPE(power10, "power10_v2.0"),
>  };
>  
>  DEFINE_TYPES(pnv_core_infos)
diff mbox series

Patch

diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
index d69cee17b232..3fec7c87d82d 100644
--- a/include/hw/ppc/pnv.h
+++ b/include/hw/ppc/pnv.h
@@ -170,7 +170,7 @@  DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER8NVL,
 DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER9,
                          TYPE_PNV_CHIP_POWER9)
 
-#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v1.0")
+#define TYPE_PNV_CHIP_POWER10 PNV_CHIP_TYPE_NAME("power10_v2.0")
 DECLARE_INSTANCE_CHECKER(PnvChip, PNV_CHIP_POWER10,
                          TYPE_PNV_CHIP_POWER10)
 
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index d16dd2d0801d..b122251d1a5d 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -1916,7 +1916,7 @@  static void pnv_machine_power10_class_init(ObjectClass *oc, void *data)
     static const char compat[] = "qemu,powernv10\0ibm,powernv";
 
     mc->desc = "IBM PowerNV (Non-Virtualized) POWER10";
-    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v1.0");
+    mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("power10_v2.0");
 
     pmc->compat = compat;
     pmc->compat_size = sizeof(compat);
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 8c2a15a0fb2f..4de8414df212 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -347,7 +347,7 @@  static const TypeInfo pnv_core_infos[] = {
     DEFINE_PNV_CORE_TYPE(power8, "power8_v2.0"),
     DEFINE_PNV_CORE_TYPE(power8, "power8nvl_v1.0"),
     DEFINE_PNV_CORE_TYPE(power9, "power9_v2.0"),
-    DEFINE_PNV_CORE_TYPE(power10, "power10_v1.0"),
+    DEFINE_PNV_CORE_TYPE(power10, "power10_v2.0"),
 };
 
 DEFINE_TYPES(pnv_core_infos)