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Mon, 9 Aug 2021 13:45:52 +0000 (GMT) Received: from yukon.ibmuc.com (unknown [9.171.54.114]) by smtp.tlslab.ibm.com (Postfix) with ESMTP id 1519722016C; Mon, 9 Aug 2021 15:45:52 +0200 (CEST) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: David Gibson , Greg Kurz Subject: [PATCH 05/26] ppc/pnv: Distribute RAM among the chips Date: Mon, 9 Aug 2021 15:45:26 +0200 Message-Id: <20210809134547.689560-6-clg@kaod.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210809134547.689560-1-clg@kaod.org> References: <20210809134547.689560-1-clg@kaod.org> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-GUID: TSF2VDjKwimTG1eGMtlfdlqpde5FmoUa X-Proofpoint-ORIG-GUID: TSF2VDjKwimTG1eGMtlfdlqpde5FmoUa X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-09_04:2021-08-06, 2021-08-09 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 mlxscore=0 phishscore=0 clxscore=1034 lowpriorityscore=0 bulkscore=0 malwarescore=0 spamscore=0 mlxlogscore=700 suspectscore=0 priorityscore=1501 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108090101 Received-SPF: softfail client-ip=148.163.158.5; envelope-from=clg@kaod.org; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -7 X-Spam_score: -0.8 X-Spam_bar: / X-Spam_report: (-0.8 / 5.0 requ) BAYES_00=-1.9, KHOP_HELO_FCRDNS=0.398, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_SOFTFAIL=0.665 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?utf-8?q?C=C3=A9dric_Le_Goa?= =?utf-8?q?ter?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" But always give the first 1GB to chip 0 as skiboot requires it. Signed-off-by: Cédric Le Goater Reviewed-by: Greg Kurz --- hw/ppc/pnv.c | 33 +++++++++++++++++++++++++-------- 1 file changed, 25 insertions(+), 8 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 025f01c55744..2f5358b70c95 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -710,6 +710,23 @@ static void pnv_chip_power10_pic_print_info(PnvChip *chip, Monitor *mon) pnv_psi_pic_print_info(&chip10->psi, mon); } +/* Always give the first 1GB to chip 0 else we won't boot */ +static uint64_t pnv_chip_get_ram_size(PnvMachineState *pnv, int chip_id) +{ + MachineState *machine = MACHINE(pnv); + uint64_t ram_per_chip; + + assert(machine->ram_size >= 1 * GiB); + + ram_per_chip = machine->ram_size / pnv->num_chips; + if (ram_per_chip >= 1 * GiB) { + return QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); + } + + ram_per_chip = (machine->ram_size - 1 * GiB) / (pnv->num_chips - 1); + return chip_id == 0 ? 1 * GiB : QEMU_ALIGN_DOWN(ram_per_chip, 1 * MiB); +} + static void pnv_init(MachineState *machine) { const char *bios_name = machine->firmware ?: FW_FILE_NAME; @@ -717,6 +734,7 @@ static void pnv_init(MachineState *machine) MachineClass *mc = MACHINE_GET_CLASS(machine); char *fw_filename; long fw_size; + uint64_t chip_ram_start = 0; int i; char *chip_typename; DriveInfo *pnor = drive_get(IF_MTD, 0, 0); @@ -821,17 +839,16 @@ static void pnv_init(MachineState *machine) char chip_name[32]; Object *chip = OBJECT(qdev_new(chip_typename)); int chip_id = i; + uint64_t chip_ram_size = pnv_chip_get_ram_size(pnv, chip_id); pnv->chips[i] = PNV_CHIP(chip); - /* - * TODO: put all the memory in one node on chip 0 until we find a - * way to specify different ranges for each chip - */ - if (i == 0) { - object_property_set_int(chip, "ram-size", machine->ram_size, - &error_fatal); - } + /* Distribute RAM among the chips */ + object_property_set_int(chip, "ram-start", chip_ram_start, + &error_fatal); + object_property_set_int(chip, "ram-size", chip_ram_size, + &error_fatal); + chip_ram_start += chip_ram_size; snprintf(chip_name, sizeof(chip_name), "chip[%d]", chip_id); object_property_add_child(OBJECT(pnv), chip_name, chip);